{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T15:47:17Z","timestamp":1648568837779},"reference-count":4,"publisher":"World Scientific Pub Co Pte Lt","issue":"02","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int. J. Soft. Eng. Knowl. Eng."],"published-print":{"date-parts":[[2005,4]]},"abstract":"<jats:p> On general purpose computer architectures, the optimization of redundancy elimination almost always improves the cycle count. We argue that a specific consideration should be taken when applying this optimization to embedded architectures that feature multiply-add(MADD) instruction. This paper presents a redundancy elimination algorithm with MADD operation aware consideration. It produces optimized results for both code size and cycle count. The algorithm is integrated into KylinC compiler, a compiler for embedded systems developed at the University of Delaware. Experimental results demonstrate that the cycle counts of the benchmark programs are reduced on average 8% and the code sizes are reduced on average 5.27%. <\/jats:p>","DOI":"10.1142\/s0218194005002208","type":"journal-article","created":{"date-parts":[[2005,5,24]],"date-time":"2005-05-24T07:56:24Z","timestamp":1116921384000},"page":"357-362","source":"Crossref","is-referenced-by-count":0,"title":["MADD OPERATION AWARE REDUNDANCY ELIMINATION"],"prefix":"10.1142","volume":"15","author":[{"given":"HAI P.","family":"WU","sequence":"first","affiliation":[{"name":"ECE Department, University of Delaware, Newark, DE 19716, USA"}]},{"given":"ZIANG","family":"HU","sequence":"additional","affiliation":[{"name":"ECE Department, University of Delaware, Newark, DE 19716, USA"}]},{"given":"JOSEPH","family":"MANZANO","sequence":"additional","affiliation":[{"name":"ECE Department, University of Delaware, Newark, DE 19716, USA"}]},{"given":"GUANG R.","family":"GAO","sequence":"additional","affiliation":[{"name":"ECE Department, University of Delaware, Newark, DE 19716, USA"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1145\/605440.605446"},{"key":"rf5","doi-asserted-by":"publisher","DOI":"10.1145\/155183.155190"},{"key":"rf6","volume":"41","author":"Linzer E.","journal-title":"IEEE Transactions on Signal Processing"},{"key":"rf8","volume-title":"Advanced Compiler Design and Implementation","author":"Muchnick Steven S.","year":"1997"}],"container-title":["International Journal of Software Engineering and Knowledge Engineering"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218194005002208","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T12:17:19Z","timestamp":1565180239000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218194005002208"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4]]},"references-count":4,"journal-issue":{"issue":"02","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2005,4]]}},"alternative-id":["10.1142\/S0218194005002208"],"URL":"https:\/\/doi.org\/10.1142\/s0218194005002208","relation":{},"ISSN":["0218-1940","1793-6403"],"issn-type":[{"value":"0218-1940","type":"print"},{"value":"1793-6403","type":"electronic"}],"subject":[],"published":{"date-parts":[[2005,4]]}}}