{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T10:50:43Z","timestamp":1780483843256,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":16,"publisher":"ACM","license":[{"start":{"date-parts":[[2004,8,9]],"date-time":"2004-08-09T00:00:00Z","timestamp":1092009600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2004,8,9]]},"DOI":"10.1145\/1013235.1013249","type":"proceedings-article","created":{"date-parts":[[2004,10,7]],"date-time":"2004-10-07T17:39:48Z","timestamp":1097170788000},"page":"32-37","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":188,"title":["Microarchitectural techniques for power gating of execution units"],"prefix":"10.1145","author":[{"given":"Zhigang","family":"Hu","sequence":"first","affiliation":[{"name":"IBM T. J. Watson Research Center"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alper","family":"Buyuktosunoglu","sequence":"additional","affiliation":[{"name":"IBM T. J. Watson Research Center"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Viji","family":"Srinivasan","sequence":"additional","affiliation":[{"name":"IBM T. J. Watson Research Center"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Victor","family":"Zyuban","sequence":"additional","affiliation":[{"name":"IBM T. J. Watson Research Center"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Hans","family":"Jacobson","sequence":"additional","affiliation":[{"name":"IBM T. J. Watson Research Center"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pradip","family":"Bose","sequence":"additional","affiliation":[{"name":"IBM T. J. Watson Research Center"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2004,8,9]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.782564"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566413"},{"key":"e_1_3_2_1_3_1","volume-title":"MICRO","author":"Dropsho S.","year":"2002","unstructured":"Dropsho , S. , Kursun , V. , Albonesi , D. H. , Dwarkadas , S. , and Friedman , E. G . Managing Static Leakage Energy in Microprocessor Functional Units . In MICRO ( 2002 ). Dropsho, S., Kursun, V., Albonesi, D. H., Dwarkadas, S., and Friedman, E. G. Managing Static Leakage Energy in Microprocessor Functional Units. In MICRO (2002)."},{"key":"e_1_3_2_1_4_1","volume-title":"ASPDAC","author":"Duarte D.","year":"2002","unstructured":"Duarte , D. , Tsai , Y. F. , Vijaykrishnan , N. , and Irwin , M. J . Evaluating Run-Time Techniques for Leakage Power Reduction . In ASPDAC ( 2002 ). Duarte, D., Tsai, Y. F., Vijaykrishnan, N., and Irwin, M. J. Evaluating Run-Time Techniques for Leakage Power Reduction. In ASPDAC (2002)."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/545214.545232"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566425"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/545214.545231"},{"key":"e_1_3_2_1_8_1","volume-title":"HPCA","author":"Iyengar V.","year":"1996","unstructured":"Iyengar , V. , Trevillyan , L. H. , and Bose , P . Representative Traces for Processor Models with Infinite Cache . In HPCA ( 1996 ). Iyengar, V., Trevillyan, L. H., and Bose, P. Representative Traces for Processor Models with Infinite Cache. In HPCA (1996)."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.988724"},{"key":"e_1_3_2_1_10_1","volume-title":"Dual-Threshold Voltage Techniques for Low-Power Digital Circuits","author":"Kao J.","year":"2000","unstructured":"Kao , J. , and Chandrakasan , A . Dual-Threshold Voltage Techniques for Low-Power Digital Circuits . IEEE Journal of Solid State Circuits 35 ( 2000 ). Kao, J., and Chandrakasan, A. Dual-Threshold Voltage Techniques for Low-Power Digital Circuits. IEEE Journal of Solid State Circuits 35 (2000)."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379268"},{"key":"e_1_3_2_1_12_1","volume-title":"IPCCC","author":"Moudgill M.","year":"1999","unstructured":"Moudgill , M. , Bose , P. , and Moreno , J. H . Validation of Turandot, a Fast Processor Model for Microarchitecture Exploration . In IPCCC ( 1999 ). Moudgill, M., Bose, P., and Moreno, J. H. Validation of Turandot, a Fast Processor Model for Microarchitecture Exploration. In IPCCC (1999)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.768496"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/344166.344526"},{"key":"e_1_3_2_1_15_1","volume-title":"Int'l Conf. on Compiler Construction","author":"Rele S.","year":"2002","unstructured":"Rele , S. , Pande , S. , Onder , S. , and Gupta , R . Optimizing Static Power Dissipation by Functional Units in Superscalar Processors . In Int'l Conf. on Compiler Construction ( 2002 ). Rele, S., Pande, S., Onder, S., and Gupta, R. Optimizing Static Power Dissipation by Functional Units in Superscalar Processors. In Int'l Conf. on Compiler Construction (2002)."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.461.0005"}],"event":{"name":"ISLPED04: International Symposium on Low Power Electronics and Design","location":"Newport Beach California USA","acronym":"ISLPED04","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the 2004 international symposium on Low power electronics and design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1013235.1013249","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1013235.1013249","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T22:43:21Z","timestamp":1750286601000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1013235.1013249"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,8,9]]},"references-count":16,"alternative-id":["10.1145\/1013235.1013249","10.1145\/1013235"],"URL":"https:\/\/doi.org\/10.1145\/1013235.1013249","relation":{},"subject":[],"published":{"date-parts":[[2004,8,9]]},"assertion":[{"value":"2004-08-09","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}