{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:55:27Z","timestamp":1750308927609,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":27,"publisher":"ACM","license":[{"start":{"date-parts":[[2004,9,27]],"date-time":"2004-09-27T00:00:00Z","timestamp":1096243200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2004,9,27]]},"DOI":"10.1145\/1017753.1017800","type":"proceedings-article","created":{"date-parts":[[2004,10,7]],"date-time":"2004-10-07T17:39:48Z","timestamp":1097170788000},"page":"297-305","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Reducing program image size by extracting frozen code and data"],"prefix":"10.1145","author":[{"given":"Daniel","family":"Citron","sequence":"first","affiliation":[{"name":"IBM Haifa Labs, Haifa, Israel"}]},{"given":"Gadi","family":"Haber","sequence":"additional","affiliation":[{"name":"IBM Haifa Labs, Haifa, Israel"}]},{"given":"Roy","family":"Levin","sequence":"additional","affiliation":[{"name":"IBM Haifa Labs, Haifa, Israel"}]}],"member":"320","published-online":{"date-parts":[[2004,9,27]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Proceedings of Workshop on Binary Rewriting","author":"Schwarz G. A. B.","year":"2001","unstructured":"G. A. B. Schwarz , S. Debray and M. Legendre . PLTO: A Link-Time Optimizer for th eIntel IA-32 Architecture . In Proceedings of Workshop on Binary Rewriting , September 2001 . G. A. B. Schwarz, S. Debray and M. Legendre. PLTO: A Link-Time Optimizer for th eIntel IA-32 Architecture. In Proceedings of Workshop on Binary Rewriting, September 2001."},{"issue":"4","key":"e_1_3_2_1_2_1","first-page":"3","volume":"9","author":"Cohn R.","year":"1997","unstructured":"R. Cohn , D. Goodwin , and P. G. Lowney . Optimizing Alpha Executables on Windows NT with Spike. Digital Technical of Digital Equipment Corporation , 9 ( 4 ): 3 -- 20 , 1997 . R. Cohn, D. Goodwin, and P. G. Lowney. Optimizing Alpha Executables on Windows NT with Spike. Digital Technical of Digital Equipment Corporation, 9(4):3--20, 1997.","journal-title":"Optimizing Alpha Executables on Windows NT with Spike. Digital Technical of Digital Equipment Corporation"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/859670.859698"},{"key":"e_1_3_2_1_4_1","unstructured":"http:\/\/www.gzip.org.  http:\/\/www.gzip.org."},{"key":"e_1_3_2_1_5_1","volume-title":"Proceedings of the 3rd Workshop on Feedback Directed and Dynamic Optimizations (FDDO)","author":"Haber G.","year":"2000","unstructured":"G. Haber , E. A. Henis , and V. Eisenberg . Reliable Post-link Optimizations Based on Partial Information . In Proceedings of the 3rd Workshop on Feedback Directed and Dynamic Optimizations (FDDO) , December 2000 . G. Haber, E. A. Henis, and V. Eisenberg. Reliable Post-link Optimizations Based on Partial Information. In Proceedings of the 3rd Workshop on Feedback Directed and Dynamic Optimizations (FDDO), December 2000."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/776261.776286"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/644254.644261"},{"key":"e_1_3_2_1_8_1","volume-title":"Proc. Of Second Workshop on Feedback Directed Optimization (FDO)","author":"Henis E. A.","year":"1999","unstructured":"E. A. Henis , G. H. M. Klausner , and A. Warshavsky . Feedback Based Post-link Optimization for Large Subsystems . In Proc. Of Second Workshop on Feedback Directed Optimization (FDO) , Haifa, Israel , November 1999 . E. A. Henis, G. H. M. Klausner, and A. Warshavsky. Feedback Based Post-link Optimization for Large Subsystems. In Proc. Of Second Workshop on Feedback Directed Optimization (FDO), Haifa, Israel, November 1999."},{"key":"e_1_3_2_1_9_1","volume-title":"Computer Architecture : A Quantitative Approach, chapter~5","author":"Hennessy J.","year":"2000","unstructured":"J. Hennessy and D. Patterson . Computer Architecture : A Quantitative Approach, chapter~5 . Morgan Kaufman Publisher , 3 rd edition, 2000 . J. Hennessy and D. Patterson. Computer Architecture : A Quantitative Approach, chapter~5. Morgan Kaufman Publisher, 3rd edition, 2000.","edition":"3"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1002\/(SICI)1097-024X(199909)29:11%3C1005::AID-SPE270%3E3.0.CO;2-F"},{"issue":"9","key":"e_1_3_2_1_11_1","first-page":"1098","article-title":"A method for the construction of minimum-redundancy codes","volume":"40","author":"Huffman D. A.","year":"1952","unstructured":"D. A. Huffman . A method for the construction of minimum-redundancy codes . Proceedings of the Institute of Radio Engineers , 40 ( 9 ): 1098 -- 1101 , September 1952 . D. A. Huffman. A method for the construction of minimum-redundancy codes. Proceedings of the Institute of Radio Engineers, 40(9):1098--1101, September 1952.","journal-title":"Proceedings of the Institute of Radio Engineers"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.5555\/320080.320094"},{"key":"e_1_3_2_1_13_1","first-page":"330","volume-title":"Proceedings of the 30th International Symposium on Microarchitecture","author":"Lee C.","year":"1997","unstructured":"C. Lee , M. Potkonjak , and W. H. Mangione-Smith . Mediabench: A tool for evaluating and synthesizing multimedia and communications systems . In Proceedings of the 30th International Symposium on Microarchitecture , pages 330 -- 335 , December 1997 . C. Lee, M. Potkonjak, and W. H. Mangione-Smith. Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In Proceedings of the 30th International Symposium on Microarchitecture, pages 330--335, December 1997."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.5555\/320080.320096"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1977.1055714"},{"key":"e_1_3_2_1_16_1","volume-title":"Run Faster. Microprocessor Report","author":"Levy M.","year":"2004","unstructured":"M. Levy . Embedded CPUs Do More , Run Faster. Microprocessor Report , February 2004 . M. Levy. Embedded CPUs Do More, Run Faster. Microprocessor Report, February 2004."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/349299.349307"},{"key":"e_1_3_2_1_18_1","first-page":"15","volume-title":"Proceedings of the Second International Symposium on Code generation and Optimization","author":"Luk C.","year":"2004","unstructured":"C. Luk , R. Muth , H. Patil , R. Cohn , and G. Lowney . Ispike: A post-link Optimizer for the Intel Itanium Architecture . In Proceedings of the Second International Symposium on Code generation and Optimization , pages 15 -- 26 , March 2004 . C. Luk, R. Muth, H. Patil, R. Cohn, and G. Lowney. Ispike: A post-link Optimizer for the Intel Itanium Architecture. In Proceedings of the Second International Symposium on Code generation and Optimization, pages 15--26, March 2004."},{"key":"e_1_3_2_1_19_1","unstructured":"MediaBench http:\/\/cares.icsl.ucla.edu\/MediaBench.  MediaBench http:\/\/cares.icsl.ucla.edu\/MediaBench."},{"key":"e_1_3_2_1_20_1","unstructured":"http:\/\/www.mips.com\/content\/Products\/Architecture.  http:\/\/www.mips.com\/content\/Products\/Architecture."},{"key":"e_1_3_2_1_22_1","volume-title":"Proc. Poster Session of the International Conference on Compiler Construction","author":"Nahshon I.","year":"1996","unstructured":"I. Nahshon and D. Bernstein . FDPR - A Post-Pass Object Code Optimization Tool . In Proc. Poster Session of the International Conference on Compiler Construction , April 1996 . I. Nahshon and D. Bernstein. FDPR - A Post-Pass Object Code Optimization Tool. In Proc. Poster Session of the International Conference on Compiler Construction, April 1996."},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/644254.644264"},{"key":"e_1_3_2_1_24_1","first-page":"1","volume-title":"Proceedings of the USENIX Windows NT Workshop","author":"Romer T.","year":"1997","unstructured":"T. Romer , G. Voelker , D. Lee , A. Wolman , W. Wong , H. Levy , B. Bershad ., and B. Chen . Instrumentation and Optimization of Win32\/Intel Executables Using Etch . In Proceedings of the USENIX Windows NT Workshop , pages 1 -- 7 , August 1997 . T. Romer, G. Voelker, D. Lee, A. Wolman, W. Wong, H. Levy, B. Bershad., and B. Chen. Instrumentation and Optimization of Win32\/Intel Executables Using Etch. In Proceedings of the USENIX Windows NT Workshop, pages 1--7, August 1997."},{"key":"e_1_3_2_1_25_1","volume-title":"ARM Architecture Reference Manual","author":"Seal D.","year":"2000","unstructured":"D. Seal , editor. ARM Architecture Reference Manual . Addison-Wesley , 2 nd edition, 2000 . D. Seal, editor. ARM Architecture Reference Manual. Addison-Wesley, 2nd edition, 2000.","edition":"2"},{"volume-title":"CPU2000: http:\/\/www.spec.org\/cpu2000\/.","author":"SPEC","key":"e_1_3_2_1_26_1","unstructured":"SPEC CPU2000: http:\/\/www.spec.org\/cpu2000\/. SPEC CPU2000: http:\/\/www.spec.org\/cpu2000\/."},{"issue":"1","key":"e_1_3_2_1_27_1","first-page":"1","article-title":"A practical System for Intermodule Code Optimization at Link-Time","volume":"1","author":"Srivastava A.","year":"1993","unstructured":"A. Srivastava and D. W. Wall . A practical System for Intermodule Code Optimization at Link-Time . Journal of Programming Languages , 1 ( 1 ): 1 -- 18 , March 1993 . A. Srivastava and D. W. Wall. A practical System for Intermodule Code Optimization at Link-Time. Journal of Programming Languages, 1(1):1--18, March 1993.","journal-title":"Journal of Programming Languages"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.5555\/144953.145003"}],"event":{"name":"EMSOFT04: Fourth ACM International Conference on Embedded Software 2004","sponsor":["SIGBED ACM Special Interest Group on Embedded Systems"],"location":"Pisa Italy","acronym":"EMSOFT04"},"container-title":["Proceedings of the 4th ACM international conference on Embedded software"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1017753.1017800","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1017753.1017800","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:36:46Z","timestamp":1750282606000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1017753.1017800"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,9,27]]},"references-count":27,"alternative-id":["10.1145\/1017753.1017800","10.1145\/1017753"],"URL":"https:\/\/doi.org\/10.1145\/1017753.1017800","relation":{},"subject":[],"published":{"date-parts":[[2004,9,27]]},"assertion":[{"value":"2004-09-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}