{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:56:36Z","timestamp":1750308996925,"version":"3.41.0"},"reference-count":16,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2004,9,1]],"date-time":"2004-09-01T00:00:00Z","timestamp":1093996800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2004,9]]},"abstract":"<jats:p>\n            \"Cache decay\" is a set of leakage-reduction mechanisms that put cache lines that have not been accessed for a specific duration into a low-leakage standby mode. This duration is called the decay interval, and its optimal value varies across applications. This paper describes an adaptation technique that analytically finds the optimal decay interval through profiling, and shows that the most important variables required for finding the optimal decay interval can be estimated with a reasonable degree of accuracy using profiling. This work explicitly trades off the leakage power saved in putting\n            <jats:italic>both<\/jats:italic>\n            the \"live\" and \"dead\" lines into standby mode, against its performance and energy costs. It achieves energy savings close to what can be obtained with an omniscient choice of per-benchmark optimal decay interval.\n          <\/jats:p>","DOI":"10.1145\/1022969.1022972","type":"journal-article","created":{"date-parts":[[2005,8,1]],"date-time":"2005-08-01T17:31:42Z","timestamp":1122917502000},"page":"305-322","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["Profile-based adaptation for cache decay"],"prefix":"10.1145","volume":"1","author":[{"given":"Karthik","family":"Sankaranarayanan","sequence":"first","affiliation":[{"name":"University of Virginia, Charlottesville, VA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kevin","family":"Skadron","sequence":"additional","affiliation":[{"name":"University of Virginia, Charlottesville, VA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2004,9]]},"reference":[{"volume-title":"Proceedings of the 32nd Annual ACM\/IEEE International Symposium on Microarchitecture. 248--259","author":"Albonesi D. H.","key":"e_1_2_1_1_1"},{"volume-title":"Proceedings of the ACM SIGPLAN 2000 Conference on Programming Languages Design and Implementation. 10","author":"Bala V.","key":"e_1_2_1_2_1"},{"volume-title":"Proceedings of the 27th Annual International Symposium on Computer Architecture. 83--94","author":"Brooks D.","key":"e_1_2_1_3_1"},{"volume-title":"Proceedings of the 29th Annual International Symposium on Computer Architecture. 147--157","author":"Flautner K.","key":"e_1_2_1_5_1"},{"volume-title":"Proceedings of the 30th Annual International Symposium on Computer Architecture. 157--168","author":"Huang M.","key":"e_1_2_1_6_1"},{"volume-title":"Proceedings of the 28th Annual International Symposium on Computer Architecture. 10","author":"Kaxiras S.","key":"e_1_2_1_7_1"},{"volume-title":"Proceedings of the IEEE 1994 CICC. 271--274","author":"Kobayashi T.","key":"e_1_2_1_8_1"},{"volume-title":"Proceedings of the 33rd Annual IEEE\/ACM International Symposium on Microarchitecture. 11--21","author":"Lee H.","key":"e_1_2_1_9_1"},{"volume-title":"Proceedings of the 2004 Design, Automation and Test in Europe Conference.","author":"Li Y.","key":"e_1_2_1_10_1"},{"volume-title":"Proceedings of the 30th Annual International Symposium on Computer Architecture. 14--27","author":"Magklis G.","key":"e_1_2_1_11_1"},{"volume-title":"Proceedings of the 1998 International Symposium on Low Power Electronics and Design. 293--298","author":"Nii K.","key":"e_1_2_1_12_1"},{"volume-title":"Proceedings of the International Symposium on Code Generation and Optimization. 36--47","author":"Scott K.","key":"e_1_2_1_14_1"},{"volume-title":"Proceedings of the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems. 45--57","author":"Sherwood T.","key":"e_1_2_1_15_1"},{"volume-title":"Proceedings of the 2002 Workshop on Memory Performance Issues.","author":"Velusamy S.","key":"e_1_2_1_16_1"},{"volume-title":"Proceedings of the Seventh International Symposium on High-Performance Computer Architecture.","author":"Yang S.-H.","key":"e_1_2_1_17_1"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/860176.860181"}],"container-title":["ACM Transactions on Architecture and Code Optimization"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1022969.1022972","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1022969.1022972","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:41:25Z","timestamp":1750282885000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1022969.1022972"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,9]]},"references-count":16,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2004,9]]}},"alternative-id":["10.1145\/1022969.1022972"],"URL":"https:\/\/doi.org\/10.1145\/1022969.1022972","relation":{},"ISSN":["1544-3566","1544-3973"],"issn-type":[{"type":"print","value":"1544-3566"},{"type":"electronic","value":"1544-3973"}],"subject":[],"published":{"date-parts":[[2004,9]]},"assertion":[{"value":"2004-09-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}