{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T00:25:39Z","timestamp":1761611139641,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":28,"publisher":"ACM","license":[{"start":{"date-parts":[[2004,9,22]],"date-time":"2004-09-22T00:00:00Z","timestamp":1095811200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2004,9,22]]},"DOI":"10.1145\/1023833.1023859","type":"proceedings-article","created":{"date-parts":[[2004,10,7]],"date-time":"2004-10-07T17:39:48Z","timestamp":1097170788000},"page":"179-189","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":25,"title":["Causality analysis of synchronous programs with delayed actions"],"prefix":"10.1145","author":[{"given":"K.","family":"Schneider","sequence":"first","affiliation":[{"name":"University of Kaiserslautern, Kaiserslautern, Germany"}]},{"given":"J.","family":"Brandt","sequence":"additional","affiliation":[{"name":"University of Kaiserslautern, Kaiserslautern, Germany"}]},{"given":"T.","family":"Schuele","sequence":"additional","affiliation":[{"name":"University of Kaiserslautern, Kaiserslautern, Germany"}]}],"member":"320","published-online":{"date-parts":[[2004,9,22]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.805826"},{"key":"e_1_3_2_1_2_1","volume-title":"Workshop on Formal Methods in VLSI Design","author":"BERRY G.","year":"1991","unstructured":"BERRY , G. A hardware implementation of pure Esterel . In Workshop on Formal Methods in VLSI Design ( Miami, Florida , January 1991 ).]] BERRY, G. A hardware implementation of pure Esterel. In Workshop on Formal Methods in VLSI Design (Miami, Florida, January 1991).]]"},{"key":"e_1_3_2_1_3_1","unstructured":"BERRY G. The constructive semantics of pure Esterel. http:\/\/www-sop.inria.fr\/esterel.org July 1999.]]  BERRY G. The constructive semantics of pure Esterel. http:\/\/www-sop.inria.fr\/esterel.org July 1999.]]"},{"key":"e_1_3_2_1_4_1","volume-title":"June","author":"BERRY G.","year":"2000","unstructured":"BERRY , G. The Esterel v5_91 language primer , June 2000 .]] BERRY, G. The Esterel v5_91 language primer, June 2000.]]"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676408"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4612-4210-9","volume-title":"Asynchronous Circuits","author":"BRZOZOWSKI J.","year":"1995","unstructured":"BRZOZOWSKI , J. , AND SEGER , C.-J. Asynchronous Circuits . Springer , 1995 .]] BRZOZOWSKI, J., AND SEGER, C.-J. Asynchronous Circuits. Springer, 1995.]]"},{"key":"e_1_3_2_1_9_1","series-title":"LNCS","first-page":"495","volume-title":"M. NUSMV: A new symbolic model verifier. In Conference on Computer Aided Verification (CAV) (Trento","author":"CIMATTI A.","year":"1999","unstructured":"CIMATTI , A. , CLARKE , E. , GIUNCHIGLIA , F. , AND ROVERI , M. NUSMV: A new symbolic model verifier. In Conference on Computer Aided Verification (CAV) (Trento , Italy, 1999 ), N. Halbwachs and D. Peled, Eds., vol. 1633 of LNCS , Springer , pp. 495 -- 499 .]] CIMATTI, A., CLARKE, E., GIUNCHIGLIA, F., AND ROVERI, M. NUSMV: A new symbolic model verifier. In Conference on Computer Aided Verification (CAV) (Trento, Italy, 1999), N. Halbwachs and D. Peled, Eds., vol. 1633 of LNCS, Springer, pp. 495--499.]]"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.entcs.2003.05.004"},{"key":"e_1_3_2_1_11_1","series-title":"ENTCS","volume-title":"Synchronous Languages, Applications, and Programming (SLAP) (Grenoble","author":"CLOSSE E.","year":"2002","unstructured":"CLOSSE , E. , POIZE , M. , PULOU , J. , VENIER , P. , AND WEIL , D. SAXO-RT: Interpreting Esterel semantic on a sequential execution structure . In Synchronous Languages, Applications, and Programming (SLAP) (Grenoble , France, 2002 ), vol. 65 of ENTCS , Elsevier .]] CLOSSE, E., POIZE, M., PULOU, J., VENIER,P.,AND WEIL, D. SAXO-RT: Interpreting Esterel semantic on a sequential execution structure. In Synchronous Languages, Applications, and Programming (SLAP) (Grenoble, France, 2002), vol. 65 of ENTCS, Elsevier.]]"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/762488.762489"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775874"},{"key":"e_1_3_2_1_14_1","unstructured":"ESTEREL TECHNOLOGY. Website. http:\/\/www.esterel-technologies.com.]]  ESTEREL TECHNOLOGY. Website. http:\/\/www.esterel-technologies.com.]]"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/530328"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/235321.235322"},{"key":"e_1_3_2_1_17_1","first-page":"479","volume-title":"Lambda-Calculus and Formalism","author":"HOWARD W.","year":"1980","unstructured":"HOWARD , W. To H. B. Curry: Essays on Combinatory Logic , Lambda-Calculus and Formalism . Academic , New York , 1980 , ch. The formulas-as-types notion of construction, pp. 479 -- 490 .]] HOWARD,W.To H.B. Curry: Essays on Combinatory Logic, Lambda-Calculus and Formalism. Academic, New York, 1980, ch. The formulas-as-types notion of construction, pp. 479--490.]]"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-12-509850-2.50007-5"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1970.222884"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.5555\/552725"},{"key":"e_1_3_2_1_21_1","volume-title":"Automation and Test in Europe (DATE)","author":"LOGOTHETIS G.","year":"2003","unstructured":"LOGOTHETIS , G. , AND SCHNEIDER , K. Exact high level WCET analysis of synchronous programs by symbolic state space exploration. In Design , Automation and Test in Europe (DATE) ( Munich, Germany , March 2003 ), IEEE Computer Society, pp. 196--203.]] LOGOTHETIS, G., AND SCHNEIDER, K. Exact high level WCET analysis of synchronous programs by symbolic state space exploration. In Design, Automation and Test in Europe (DATE) (Munich, Germany, March 2003), IEEE Computer Society, pp. 196--203.]]"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.293952"},{"key":"e_1_3_2_1_23_1","volume-title":"http:\/\/www-cad.eecs.berkeley.edu\/~kenmcmil","author":"MCMILLAN K.","year":"2000","unstructured":"MCMILLAN , K. Cadence SMV. http:\/\/www-cad.eecs.berkeley.edu\/~kenmcmil , 2000 .]] MCMILLAN, K. Cadence SMV. http:\/\/www-cad.eecs.berkeley.edu\/~kenmcmil, 2000.]]"},{"key":"e_1_3_2_1_24_1","series-title":"LNCS","doi-asserted-by":"crossref","first-page":"394","DOI":"10.1007\/3-540-48683-6_34","volume-title":"Conference on Computer Aided Verification (CAV) (Trento","author":"NAMJOSHI K.","year":"1999","unstructured":"NAMJOSHI , K. , AND KURSHAN , R. Efficient analysis of cyclic definitions . In Conference on Computer Aided Verification (CAV) (Trento , Italy, 1999 ), N. Halbwachs and D. Peled, Eds., vol. 1633 of LNCS , Springer , pp. 394 -- 405 .]] NAMJOSHI, K., AND KURSHAN, R. Efficient analysis of cyclic definitions. In Conference on Computer Aided Verification (CAV) (Trento, Italy, 1999), N. Halbwachs and D. Peled, Eds., vol. 1633 of LNCS, Springer, pp. 394--405.]]"},{"key":"e_1_3_2_1_25_1","volume-title":"International Workshop on Logic and Synthesis (IWLS)","author":"RIEDEL M.","year":"2003","unstructured":"RIEDEL , M. , AND BRUCK , J. Cyclic combinational circuits: Analysis for synthesis . In International Workshop on Logic and Synthesis (IWLS) ( Laguna Beach, California , 2003 ).]] RIEDEL, M., AND BRUCK, J. Cyclic combinational circuits: Analysis for synthesis. In International Workshop on Logic and Synthesis (IWLS) (Laguna Beach, California, 2003).]]"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775875"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1977.1674886"},{"key":"e_1_3_2_1_28_1","volume-title":"Conference on Algorithms and Parallel VLSI Architectures II (Chateau de Bonas","author":"ROCHETEAU F.","year":"1991","unstructured":"ROCHETEAU , F. , AND HALBWACHS , N. Pollux, a Lustre-based hardware design environment . In Conference on Algorithms and Parallel VLSI Architectures II (Chateau de Bonas , 1991 ), P. Quinton and Y. Robert, Eds.]] ROCHETEAU,F.,AND HALBWACHS, N. Pollux, a Lustre-based hardware design environment. In Conference on Algorithms and Parallel VLSI Architectures II (Chateau de Bonas, 1991), P. Quinton and Y. Robert, Eds.]]"},{"key":"e_1_3_2_1_29_1","first-page":"205","volume-title":"Workshop on Distributed and Parallel Embedded Systems (DIPES) (SchloB Ehringerfeld, Germany","author":"SCHNEIDER K.","year":"2000","unstructured":"SCHNEIDER , K. A verified hardware synthesis for Esterel . In Workshop on Distributed and Parallel Embedded Systems (DIPES) (SchloB Ehringerfeld, Germany , 2000 ), F. Rammig, Ed., Kluwer , pp. 205 -- 214 .]] SCHNEIDER, K. A verified hardware synthesis for Esterel. In Workshop on Distributed and Parallel Embedded Systems (DIPES) (SchloB Ehringerfeld, Germany, 2000), F. Rammig, Ed., Kluwer, pp. 205--214.]]"}],"event":{"name":"CASES04: 2004 International Conference on Compilers, Architectures and Synthesis for Embedded Systems","sponsor":["SIGBED ACM Special Interest Group on Embedded Systems","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"Washington DC USA","acronym":"CASES04"},"container-title":["Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1023833.1023859","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1023833.1023859","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T17:23:53Z","timestamp":1750267433000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1023833.1023859"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,9,22]]},"references-count":28,"alternative-id":["10.1145\/1023833.1023859","10.1145\/1023833"],"URL":"https:\/\/doi.org\/10.1145\/1023833.1023859","relation":{},"subject":[],"published":{"date-parts":[[2004,9,22]]},"assertion":[{"value":"2004-09-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}