{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,27]],"date-time":"2026-02-27T03:45:16Z","timestamp":1772163916187,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":38,"publisher":"ACM","license":[{"start":{"date-parts":[[2004,10,7]],"date-time":"2004-10-07T00:00:00Z","timestamp":1097107200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2004,10,7]]},"DOI":"10.1145\/1024393.1024395","type":"proceedings-article","created":{"date-parts":[[2004,10,7]],"date-time":"2004-10-07T13:39:48Z","timestamp":1097156388000},"page":"1-13","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":90,"title":["Programming with transactional coherence and consistency (TCC)"],"prefix":"10.1145","author":[{"given":"Lance","family":"Hammond","sequence":"first","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Brian D.","family":"Carlstrom","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vicky","family":"Wong","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ben","family":"Hertzberg","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mike","family":"Chen","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christos","family":"Kozyrakis","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kunle","family":"Olukotun","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2004,10,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.546611"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339691"},{"key":"e_1_3_2_1_3_1","volume-title":"The Java Programming Language","author":"Arnold K.","year":"2000","unstructured":"K. Arnold , J. Gosling , and D. Holmes , The Java Programming Language , Third Edition, Addison-Wesley Professional , 2000 . K. Arnold, J. Gosling, and D. Holmes, The Java Programming Language, Third Edition, Addison-Wesley Professional, 2000."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/645607.661659"},{"key":"e_1_3_2_1_5_1","unstructured":"Broadcom Corp. \"The Broadcom BCM-1250 Multiprocessor \" Presentation at 2002 Embedded Processor Forum April 2002.  Broadcom Corp. \"The Broadcom BCM-1250 Multiprocessor \" Presentation at 2002 Embedded Processor Forum April 2002."},{"key":"e_1_3_2_1_6_1","unstructured":"Byte Magazine jBYTEmark Benchmark http:\/\/www.byte.com CMP Media LLC 1999.  Byte Magazine jBYTEmark Benchmark http:\/\/www.byte.com CMP Media LLC 1999."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859668"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/125826.125941"},{"key":"e_1_3_2_1_9_1","author":"Gray J.","year":"1993","unstructured":"J. Gray and A. Reuter , Transaction Processing: Concepts and Techniques, Morgan Kaufmann , 1993 . J. Gray and A. Reuter, Transaction Processing: Concepts and Techniques, Morgan Kaufmann, 1993.","journal-title":"Transaction Processing: Concepts and Techniques, Morgan Kaufmann"},{"key":"e_1_3_2_1_10_1","volume-title":"Using MPI: Portable Parallel Programming with the Message Passing Interface","author":"Gropp W.","year":"1994","unstructured":"W. Gropp , E. Lusk , and A. Skjellum , Using MPI: Portable Parallel Programming with the Message Passing Interface , MIT Press , 1994 . W. Gropp, E. Lusk, and A. Skjellum, Using MPI: Portable Parallel Programming with the Message Passing Interface, MIT Press, 1994."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.848474"},{"key":"e_1_3_2_1_12_1","first-page":"102","author":"Hammond L.","year":"2004","unstructured":"L. Hammond , V. Wong , M. Chen , B. D. Carlstrom , J. D. Davis , B. Hertzberg , M. K. Prabhu , H. Wijaya , C. Kozyrakis , and K. Olukotun , \"Transactional Memory Coherence and Consistency,\" Proceedings of the 31st Annual Symposium on Computer Architecture (ISCA-31) , pp. 102 -- 113 , June 2004 . L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun, \"Transactional Memory Coherence and Consistency,\" Proceedings of the 31st Annual Symposium on Computer Architecture (ISCA-31), pp. 102--113, June 2004.","journal-title":"\"Transactional Memory Coherence and Consistency,\" Proceedings of the 31st Annual Symposium on Computer Architecture (ISCA-31)"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/949305.949340"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/872035.872048"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165164"},{"key":"e_1_3_2_1_16_1","volume-title":"SC23-2465-02","author":"IBM Corporation","year":"1994","unstructured":"IBM Corporation , Encina Transactional-C Programmer's Guide and Reference for AIX , SC23-2465-02 , 1994 . IBM Corporation, Encina Transactional-C Programmer's Guide and Reference for AIX, SC23-2465-02, 1994."},{"key":"e_1_3_2_1_17_1","unstructured":"Java Grande Forum Java Grande Benchmark Suite http:\/\/www.epcc.ed.ac.uk\/javagrande\/ 2000.  Java Grande Forum Java Grande Benchmark Suite http:\/\/www.epcc.ed.ac.uk\/javagrande\/ 2000."},{"key":"e_1_3_2_1_18_1","volume-title":"CA","author":"Kalla R.","year":"2003","unstructured":"R. Kalla , B. Sinharoy , and J. Tendler , \" Simultaneous Multi-threading Implementation in POWER5,\" Conference Record of Hot Chips 15 Symposium, Palo Alto , CA , August 2003 . R. Kalla, B. Sinharoy, and J. Tendler, \"Simultaneous Multi-threading Implementation in POWER5,\" Conference Record of Hot Chips 15 Symposium, Palo Alto, CA, August 2003."},{"key":"e_1_3_2_1_19_1","first-page":"279","volume-title":"Lazy Release Consistency for Software Distributed Shared Memory,\" Proceedings of the Fifth International Symposium on High-Performance Computer Architecture","author":"Keleher P.","year":"1999","unstructured":"P. Keleher , A. L. Cox , and W. Zwaenepoel , \" Lazy Release Consistency for Software Distributed Shared Memory,\" Proceedings of the Fifth International Symposium on High-Performance Computer Architecture , pp. 279 -- 283 , Orlando , FL , 1999 . P. Keleher, A. L. Cox, and W. Zwaenepoel, \"Lazy Release Consistency for Software Distributed Shared Memory,\" Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, pp. 279--283, Orlando, FL, 1999."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/319838.319854"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/224170.224398"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.795218"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/319566.319567"},{"key":"e_1_3_2_1_24_1","volume-title":"NC","author":"Lee C.","year":"1997","unstructured":"C. Lee , M. Potkonjak , and W. Mangione-Smith , \" MediaBench: A tool for evaluating and synthesizing multimedia and communication systems,\" Proceedings of the 30th Annual International Symposium on Microarchitecture (MICRO-97), Research Triangle Park , NC , December 1997 . C. Lee, M. Potkonjak, and W. Mangione-Smith, \"MediaBench: A tool for evaluating and synthesizing multimedia and communication systems,\" Proceedings of the 30th Annual International Symposium on Microarchitecture (MICRO-97), Research Triangle Park, NC, December 1997."},{"key":"e_1_3_2_1_25_1","volume-title":"Multithreaded Programming with Pthreads","author":"Lewis B.","year":"1998","unstructured":"B. Lewis and D.J. Berg , Multithreaded Programming with Pthreads , Prentice Hall , 1998 . B. Lewis and D.J. Berg, Multithreaded Programming with Pthreads, Prentice Hall, 1998."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605400"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/305138.305155"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605417"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/781498.781500"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605399"},{"key":"e_1_3_2_1_31_1","volume-title":"CA","author":"Raman R.","year":"2003","unstructured":"R. Raman , \" UltraSparc Gemini : Dual CPU Processor,\" Conference Record of Hot Chips 15 Symposium, Palo Alto , CA , August 2003 . R. Raman, \"UltraSparc Gemini: Dual CPU Processor,\" Conference Record of Hot Chips 15 Symposium, Palo Alto, CA, August 2003."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/224964.224987"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.224451"},{"key":"e_1_3_2_1_34_1","unstructured":"Standard Performance Evaluation Corporation SPECjbb2000 v1.01 http:\/\/www.spec.org\/jbb2000\/ Warrenton VA 2000.  Standard Performance Evaluation Corporation SPECjbb2000 v1.01 http:\/\/www.spec.org\/jbb2000\/ Warrenton VA 2000."},{"key":"e_1_3_2_1_35_1","volume-title":"http:\/\/www.specbench.org\/","author":"Standard Performance Evaluation Corporation","year":"1995","unstructured":"Standard Performance Evaluation Corporation , SPEC* , http:\/\/www.specbench.org\/ , Warrenton, VA , 1995 -2000. Standard Performance Evaluation Corporation, SPEC*, http:\/\/www.specbench.org\/, Warrenton, VA, 1995-2000."},{"key":"e_1_3_2_1_36_1","first-page":"2","volume-title":"The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization,\" Proceedings of the Fourth International Symposium on High-Performance Computer Architecture","author":"Steffan J.","year":"1998","unstructured":"J. Steffan and T. Mowry , \" The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization,\" Proceedings of the Fourth International Symposium on High-Performance Computer Architecture , pp. 2 -- 13 , Las Vegas , Nevada , 1998 . J. Steffan and T. Mowry, \"The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization,\" Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, pp. 2--13, Las Vegas, Nevada, 1998."},{"key":"e_1_3_2_1_37_1","first-page":"81","author":"Vijaykumar T.N.","year":"1998","unstructured":"T.N. Vijaykumar and G. S. Sohi , \"Task Selection for a Multiscalar Processor,\" Proceedings of the 31st International Symposium on Microarchitecture (MICRO-31) , pp. 81 -- 92 , December 1998 . T.N. Vijaykumar and G. S. Sohi, \"Task Selection for a Multiscalar Processor,\" Proceedings of the 31st International Symposium on Microarchitecture (MICRO-31), pp. 81--92, December 1998.","journal-title":"\"Task Selection for a Multiscalar Processor,\" Proceedings of the 31st International Symposium on Microarchitecture (MICRO-31)"},{"key":"e_1_3_2_1_38_1","unstructured":"T. Wilkinson Kaffe Virtual Machine http:\/\/kaffe.org 1997-2002.  T. Wilkinson Kaffe Virtual Machine http:\/\/kaffe.org 1997-2002."}],"event":{"name":"ASPLOS04: Architectural Support for Programming Languages and Operating Systems","location":"Boston MA USA","acronym":"ASPLOS04","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","ACM Association for Computing Machinery","SIGARCH ACM Special Interest Group on Computer Architecture"]},"container-title":["Proceedings of the 11th international conference on Architectural support for programming languages and operating systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1024393.1024395","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1024393.1024395","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:23:54Z","timestamp":1750253034000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1024393.1024395"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,10,7]]},"references-count":38,"alternative-id":["10.1145\/1024393.1024395","10.1145\/1024393"],"URL":"https:\/\/doi.org\/10.1145\/1024393.1024395","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/1037949.1024395","asserted-by":"object"},{"id-type":"doi","id":"10.1145\/1037947.1024395","asserted-by":"object"},{"id-type":"doi","id":"10.1145\/1037187.1024395","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2004,10,7]]},"assertion":[{"value":"2004-10-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}