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Recent portable applications require reconfigurability of a system along with efficiency in terms of power, performance, and area. The field programmable gate arrays (FPGAs) provide a reconfigurable platform; however, they are slower in speed with significantly higher power and area than achievable by a customized application-specific integrated circuits (ASIC). Implementation of a system in either FPGA or ASIC represents a trade-off between programmability and design efficiency. In this work, we have developed techniques to realize efficient reconfigurable cores for a set of user-specified applications. The resultant system, named as<jats:italic>multimode<\/jats:italic>system, can easily switch configurations throughout the set of configurations it is designed for. A data flow graph transformation method coupled with efficient scheduling and allocation is used to automatically synthesize a<jats:italic>Multi-Mode<\/jats:italic>system from its behavior-level specifications. Experimental results on several applications demonstrate that our implementations can achieve about 60X power reduction on average and run 3.5X faster over corresponding FPGA implementations.<\/jats:p>","DOI":"10.1145\/1053271.1053278","type":"journal-article","created":{"date-parts":[[2005,8,2]],"date-time":"2005-08-02T08:38:10Z","timestamp":1122971890000},"page":"168-188","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":17,"title":["Synthesis of application-specific highly efficient multi-mode cores for embedded systems"],"prefix":"10.1145","volume":"4","author":[{"given":"Lih-yih","family":"Chiou","sequence":"first","affiliation":[{"name":"Purdue University, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Swarup","family":"Bhunia","sequence":"additional","affiliation":[{"name":"Purdue University, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kaushik","family":"Roy","sequence":"additional","affiliation":[{"name":"Purdue University, IN"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,2]]},"reference":[{"volume-title":"Proceedings of 1998 ACM\/SIGDA 6th International Symposium on Field Programming Gate Arrays. 234--243","author":"Anderson J.","key":"e_1_2_1_1_1"},{"key":"e_1_2_1_2_1","unstructured":"Arccores. 2000. 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