{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,23]],"date-time":"2026-04-23T14:47:34Z","timestamp":1776955654954,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","license":[{"start":{"date-parts":[[2005,4,3]],"date-time":"2005-04-03T00:00:00Z","timestamp":1112486400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2005,4,3]]},"DOI":"10.1145\/1055137.1055166","type":"proceedings-article","created":{"date-parts":[[2005,8,3]],"date-time":"2005-08-03T08:31:47Z","timestamp":1123057907000},"page":"137-144","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":10,"title":["An efficient technology mapping algorithm targeting routing congestion under delay constraints"],"prefix":"10.1145","author":[{"given":"Rupesh S.","family":"Shelar","sequence":"first","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Prashant","family":"Saxena","sequence":"additional","affiliation":[{"name":"Synopsys Inc., Hillsboro, OR"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xinning","family":"Wang","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sachin S.","family":"Sapatnekar","sequence":"additional","affiliation":[{"name":"University of Minnesota, Minneapolis, MN"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,4,3]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"114","volume-title":"Electronics","author":"Moore G. E.","year":"1965","unstructured":"G. E. Moore . Cramming more components onto integrated circuits . In Electronics , pages 114 -- 117 , April 1965 . G. E. Moore. Cramming more components onto integrated circuits. In Electronics, pages 114--117, April 1965."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.825841"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514035"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/37888.37940"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.5555\/113938.149573"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/277044.277142"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/611817.611836"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.5555\/882452.874538"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.809646"},{"key":"e_1_3_2_1_10_1","first-page":"216","volume-title":"Proc. ICCAD","author":"Stok L.","year":"2001","unstructured":"L. Stok and T. Kutzschebauch . Congestion aware layout driven logic synthesis . In Proc. ICCAD , pages 216 -- 223 , November 2001 . L. Stok and T. Kutzschebauch. Congestion aware layout driven logic synthesis. In Proc. ICCAD, pages 216--223, November 2001."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/981066.981111"},{"key":"e_1_3_2_1_12_1","volume-title":"Proc. IWLS","author":"Liu Q.","year":"2004","unstructured":"Q. Liu and M. Marek-Sadowska . Technology mapping with pre-layout wirelength prediction . In Proc. IWLS , June 2004 . Q. Liu and M. Marek-Sadowska. Technology mapping with pre-layout wirelength prediction. In Proc. IWLS, June 2004."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/774572.774653"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996726"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/127601.127635"},{"key":"e_1_3_2_1_16_1","volume-title":"May","author":"Sentovich E. M.","year":"1992","unstructured":"E. M. Sentovich SIS: A system for sequential circuit synthesis. Memorandum No. UCB\/ERL M92\/41 , May 1992 . E. M. Sentovich et al. SIS: A system for sequential circuit synthesis. Memorandum No. UCB\/ERL M92\/41, May 1992."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/981066.981110"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/369691.369766"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.974135"},{"key":"e_1_3_2_1_20_1","unstructured":"Berkeley predictive technology model. http:\/\/www-device.eecs.berkeley.edu\/~ptm\/download.html.  Berkeley predictive technology model. http:\/\/www-device.eecs.berkeley.edu\/~ptm\/download.html."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337549"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.801083"}],"event":{"name":"ISPD05: International Symposium on Physical Design 2005","location":"San Francisco California USA","acronym":"ISPD05","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the 2005 international symposium on Physical design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1055137.1055166","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1055137.1055166","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T16:08:10Z","timestamp":1750262890000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1055137.1055166"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4,3]]},"references-count":22,"alternative-id":["10.1145\/1055137.1055166","10.1145\/1055137"],"URL":"https:\/\/doi.org\/10.1145\/1055137.1055166","relation":{},"subject":[],"published":{"date-parts":[[2005,4,3]]},"assertion":[{"value":"2005-04-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}