{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:54:59Z","timestamp":1750308899697,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2005,4,17]],"date-time":"2005-04-17T00:00:00Z","timestamp":1113696000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2005,4,17]]},"DOI":"10.1145\/1057661.1057681","type":"proceedings-article","created":{"date-parts":[[2005,8,3]],"date-time":"2005-08-03T08:31:47Z","timestamp":1123057907000},"page":"74-77","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["Exact minimum-width transistor placement without dual constraint for CMOS cells"],"prefix":"10.1145","author":[{"given":"Tetsuya","family":"Iizuka","sequence":"first","affiliation":[{"name":"University of Tokyo, Tokyo, Japan"}]},{"given":"Makoto","family":"Ikeda","sequence":"additional","affiliation":[{"name":"University of Tokyo, Tokyo, Japan"}]},{"given":"Kunihiro","family":"Asada","sequence":"additional","affiliation":[{"name":"University of Tokyo, Tokyo, Japan"}]}],"member":"320","published-online":{"date-parts":[[2005,4,17]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/266021.266126"},{"key":"e_1_3_2_1_2_1","unstructured":"abraCAD Documentation Synopsys Inc. 2003.  abraCAD Documentation Synopsys Inc. 2003."},{"key":"e_1_3_2_1_3_1","unstructured":"Progenesis Guide Prolific Inc. 2003.  Progenesis Guide Prolific Inc. 2003."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/127601.127717"},{"key":"e_1_3_2_1_5_1","first-page":"660","volume-title":"IEEE\/ACM Int. Conf. on Computer Aided Design","author":"Gupta A.","year":"1996","unstructured":"A. Gupta and J. P. Hayes , \" Width Minimization of Two-Dimensional CMOS Cells Using Integer Programming,\" in Proc . IEEE\/ACM Int. Conf. on Computer Aided Design , pp. 660 -- 667 , 1996 . A. Gupta and J. P. Hayes, \"Width Minimization of Two-Dimensional CMOS Cells Using Integer Programming,\" in Proc. IEEE\/ACM Int. Conf. on Computer Aided Design, pp. 660--667, 1996."},{"key":"e_1_3_2_1_6_1","first-page":"30","author":"Uehara T.","unstructured":"T. Uehara and W. M. vanCleemput , \"Optimal Layout of CMOS Functional Arrays ,\" IEEE Trans. on Computers , vol. C - 30 , No. 5, pp. 305--312, May 1981. T. Uehara and W. M. vanCleemput, \"Optimal Layout of CMOS Functional Arrays,\" IEEE Trans. on Computers, vol. C-30, No. 5, pp. 305--312, May 1981.","journal-title":"IEEE Trans. on Computers"},{"key":"e_1_3_2_1_7_1","first-page":"149","volume-title":"IEEE Asia and South Pacific Design Automation Conf.","author":"Iizuka T.","year":"2004","unstructured":"T. Iizuka , M. Ikeda , and K. Asada , \" High Speed Layout Synthesis for Minimum-Width CMOS Logic Cells via Boolean Satisfiability,\" in Proc . IEEE Asia and South Pacific Design Automation Conf. , pp. 149 -- 154 , 2004 . T. Iizuka, M. Ikeda, and K. Asada, \"High Speed Layout Synthesis for Minimum-Width CMOS Logic Cells via Boolean Satisfiability,\" in Proc. IEEE Asia and South Pacific Design Automation Conf., pp. 149--154, 2004."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/774572.774638"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379017"}],"event":{"name":"GLSVLSI05: Great Lakes Symposium on VLSI 2005","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"Chicago Illinois USA","acronym":"GLSVLSI05"},"container-title":["Proceedings of the 15th ACM Great Lakes symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057681","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1057661.1057681","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:25:59Z","timestamp":1750281959000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057681"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4,17]]},"references-count":9,"alternative-id":["10.1145\/1057661.1057681","10.1145\/1057661"],"URL":"https:\/\/doi.org\/10.1145\/1057661.1057681","relation":{},"subject":[],"published":{"date-parts":[[2005,4,17]]},"assertion":[{"value":"2005-04-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}