{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:54:59Z","timestamp":1750308899924,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":8,"publisher":"ACM","license":[{"start":{"date-parts":[[2005,4,17]],"date-time":"2005-04-17T00:00:00Z","timestamp":1113696000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2005,4,17]]},"DOI":"10.1145\/1057661.1057682","type":"proceedings-article","created":{"date-parts":[[2005,8,3]],"date-time":"2005-08-03T08:31:47Z","timestamp":1123057907000},"page":"78-83","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping"],"prefix":"10.1145","author":[{"given":"Vishal","family":"Suthar","sequence":"first","affiliation":[{"name":"University of Illinois-Chicago, IL"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shantanu","family":"Dutt","sequence":"additional","affiliation":[{"name":"University of Illinois-Chicago, IL"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,4,17]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996705"},{"key":"e_1_3_2_1_2_1","first-page":"31","volume-title":"Proc. 6th IEEE Intl Online Testing Workshop","author":"Abramovici M.","year":"2000","unstructured":"M. Abramovici , C. Stroud , B. Skaggs and J. Emmert , \" Improving online BIST-based diagnosis for roving STARs \", Proc. 6th IEEE Intl Online Testing Workshop , 2000 , pp 31 -- 39 . M. Abramovici, C. Stroud, B. Skaggs and J. Emmert, \"Improving online BIST-based diagnosis for roving STARs\", Proc. 6th IEEE Intl Online Testing Workshop, 2000, pp 31--39."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.736139"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.678888"},{"key":"e_1_3_2_1_5_1","volume-title":"Proc. ICCAD","author":"Wang S. J.","year":"1987","unstructured":"S. J. Wang and T. M. Tai , \" Test and Diagnosis of Faulty Logic Blocks in FPGAs \", Proc. ICCAD , 1987 . S. J. Wang and T. M. Tai, \"Test and Diagnosis of Faulty Logic Blocks in FPGAs\", Proc. ICCAD, 1987."},{"key":"e_1_3_2_1_6_1","first-page":"450","volume-title":"VTS","author":"Huang W. K.","year":"1996","unstructured":"W. K. Huang and F.Lombardi, \"An approach to testing of Programmable\/Configurable FPGAs,\" Proc . VTS , pp. 450 -- 455 , 1996 . W. K. Huang and F.Lombardi, \"An approach to testing of Programmable\/Configurable FPGAs,\" Proc. VTS, pp. 450--455, 1996."},{"key":"e_1_3_2_1_7_1","first-page":"208","volume-title":"29th FTCS.","author":"Steininger A.","year":"1999","unstructured":"A. Steininger and C. Scherrer , \" On the Necessity of On-Line BIST in Safety-Critical Applications,\" Proc . 29th FTCS. , pp. 208 -- 215 , 1999 . A. Steininger and C. Scherrer, \"On the Necessity of On-Line BIST in Safety-Critical Applications,\" Proc. 29th FTCS., pp. 208--215, 1999."},{"key":"e_1_3_2_1_8_1","first-page":"471","article-title":"On-Line Testable Logic Design for FPGA Implementation","author":"Burress A.","year":"1997","unstructured":"A. Burress and P. Lala , \" On-Line Testable Logic Design for FPGA Implementation .,\" Proc. Intn'l Test Conf. , pp. 471 -- 478 , 1997 . A. Burress and P. Lala, \"On-Line Testable Logic Design for FPGA Implementation.,\" Proc. Intn'l Test Conf., pp. 471--478, 1997.","journal-title":"Proc. Intn'l Test Conf."}],"event":{"name":"GLSVLSI05: Great Lakes Symposium on VLSI 2005","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"Chicago Illinois USA","acronym":"GLSVLSI05"},"container-title":["Proceedings of the 15th ACM Great Lakes symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057682","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1057661.1057682","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:25:59Z","timestamp":1750281959000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057682"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4,17]]},"references-count":8,"alternative-id":["10.1145\/1057661.1057682","10.1145\/1057661"],"URL":"https:\/\/doi.org\/10.1145\/1057661.1057682","relation":{},"subject":[],"published":{"date-parts":[[2005,4,17]]},"assertion":[{"value":"2005-04-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}