{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:55:00Z","timestamp":1750308900081,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2005,4,17]],"date-time":"2005-04-17T00:00:00Z","timestamp":1113696000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2005,4,17]]},"DOI":"10.1145\/1057661.1057694","type":"proceedings-article","created":{"date-parts":[[2005,8,3]],"date-time":"2005-08-03T08:31:47Z","timestamp":1123057907000},"page":"134-137","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["Noise-tolerant high fan-in dynamic CMOS circuit design"],"prefix":"10.1145","author":[{"given":"Walid","family":"Elgharbawy","sequence":"first","affiliation":[{"name":"University of Louisiana at Lafayette, Lafayette, LA"}]},{"given":"Pradeep","family":"Golconda","sequence":"additional","affiliation":[{"name":"University of Louisiana at Lafayette, Lafayette, LA"}]},{"given":"Magdy","family":"Bayoumi","sequence":"additional","affiliation":[{"name":"University of Louisiana at Lafayette, Lafayette, LA"}]}],"member":"320","published-online":{"date-parts":[[2005,4,17]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"2001","article-title":"Interconnect and Noise Immunity Design for the Pentium 4 Processor","volume":"2001","author":"Kumar R.","journal-title":"Intel Technology Journal, Q1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_2_1","DOI":"10.1145\/344166.344562"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.5555\/557173"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_4_1","DOI":"10.1145\/313817.313908"},{"key":"e_1_3_2_1_5_1","first-page":"221","volume-title":"Proc. of 2000 ASIC conference","author":"Wang L.","year":"2000"},{"unstructured":"Berkeley Predictive Technology Model (BPTM) http:\/\/www-device.eecs.Berkeley.edu\/~ptm\/  Berkeley Predictive Technology Model (BPTM) http:\/\/www-device.eecs.Berkeley.edu\/~ptm\/","key":"e_1_3_2_1_6_1"},{"key":"e_1_3_2_1_7_1","first-page":"40","volume-title":"Tech. Papers Symp. VLSI Circuits","author":"Ye Y.","year":"1998"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1109\/4.997857"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_9_1","DOI":"10.1109\/TCSI.2004.823665"}],"event":{"sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"acronym":"GLSVLSI05","name":"GLSVLSI05: Great Lakes Symposium on VLSI 2005","location":"Chicago Illinois USA"},"container-title":["Proceedings of the 15th ACM Great Lakes symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057694","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1057661.1057694","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:25:59Z","timestamp":1750281959000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057694"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4,17]]},"references-count":9,"alternative-id":["10.1145\/1057661.1057694","10.1145\/1057661"],"URL":"https:\/\/doi.org\/10.1145\/1057661.1057694","relation":{},"subject":[],"published":{"date-parts":[[2005,4,17]]},"assertion":[{"value":"2005-04-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}