{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:55:00Z","timestamp":1750308900513,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":33,"publisher":"ACM","license":[{"start":{"date-parts":[[2005,4,17]],"date-time":"2005-04-17T00:00:00Z","timestamp":1113696000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2005,4,17]]},"DOI":"10.1145\/1057661.1057728","type":"proceedings-article","created":{"date-parts":[[2005,8,3]],"date-time":"2005-08-03T08:31:47Z","timestamp":1123057907000},"page":"276-281","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":15,"title":["Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors"],"prefix":"10.1145","author":[{"given":"Mirko","family":"Loghi","sequence":"first","affiliation":[{"name":"Universit\u00e0 di Verona, Verona, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Martin","family":"Letis","sequence":"additional","affiliation":[{"name":"Universit\u00e0 di Verona, Verona, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Benini","sequence":"additional","affiliation":[{"name":"Universit\u00e0 di Bologna, Bologna, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Massimo","family":"Poncino","sequence":"additional","affiliation":[{"name":"Politecnico di Torino, Torino, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,4,17]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"\"Broadening the Reach of the Intel Itanium 2 Processor Family \" Technical White Paper www.intel.com\/ebusiness\/pdf\/prod\/itanium\/wp reach.pdf  \"Broadening the Reach of the Intel Itanium 2 Processor Family \" Technical White Paper www.intel.com\/ebusiness\/pdf\/prod\/itanium\/wp reach.pdf"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.888700"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.461.0005"},{"key":"e_1_3_2_1_4_1","volume-title":"Kluwer Academic Publishers","author":"Platform P.","year":"2003","unstructured":"P. Cumming \"The TI OMAP Platform Approach to SoC,\" in Winning the SOC Revolution , Kluwer Academic Publishers , 2003 . P. Cumming \"The TI OMAP Platform Approach to SoC,\" in Winning the SOC Revolution, Kluwer Academic Publishers, 2003."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.826824"},{"key":"e_1_3_2_1_7_1","unstructured":"Philips Semiconductor \"Philips Nexperia Platform\" www.semiconductors.philips.com\/products\/nexperia\/home S. Dutta R. Jensen A. Rieckmann.  Philips Semiconductor \"Philips Nexperia Platform\" www.semiconductors.philips.com\/products\/nexperia\/home S. Dutta R. Jensen A. Rieckmann."},{"key":"e_1_3_2_1_8_1","first-page":"281","volume-title":"Kluwer Academic Publishers","author":"Grammatikakis M.","year":"2003","unstructured":"M. Grammatikakis , M. Coppola , F. Sensini , \"Software for Multiprocessor Networks-on-Chip,\" Networks on Chip , Kluwer Academic Publishers , pp. 281 -- 303 , 2003 . M. Grammatikakis, M. Coppola, F. Sensini, \"Software for Multiprocessor Networks-on-Chip,\" Networks on Chip, Kluwer Academic Publishers, pp. 281--303, 2003."},{"key":"e_1_3_2_1_9_1","first-page":"3","article-title":"IC Design Challenges for Ambient Intelligence","author":"Aarts E.","year":"2003","unstructured":"E. Aarts , R. Roovers , \" IC Design Challenges for Ambient Intelligence ,\" Design, Automation and Test in Europe , pp. 3 -- 7 , 2003 . E. Aarts, R. Roovers, \"IC Design Challenges for Ambient Intelligence,\" Design, Automation and Test in Europe, pp. 3--7, 2003.","journal-title":"Design, Automation and Test in Europe"},{"key":"e_1_3_2_1_10_1","volume-title":"A Computational Platform Perspective\" in: Ambient Intelligence: Impact on Embedded System Design","author":"Benini L.","year":"2003","unstructured":"L. Benini , M. Poncino , \"Ambient Intelligence : A Computational Platform Perspective\" in: Ambient Intelligence: Impact on Embedded System Design , T. Basten, M. Geilen, H. de Groot eds. Kluwer Academic Publishers , 2003 . L. Benini, M. Poncino, \"Ambient Intelligence: A Computational Platform Perspective\" in: Ambient Intelligence: Impact on Embedded System Design, T. Basten, M. Geilen, H. de Groot eds. Kluwer Academic Publishers, 2003."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4757-5808-5","volume-title":"Memory Design Techniques for Low-Energy Embedded Systems","author":"Macii A.","year":"2002","unstructured":"A. Macii , L. Benini , M. Poncino , Memory Design Techniques for Low-Energy Embedded Systems , Kluwer Academic Publishers , 2002 . A. Macii, L. Benini, M. Poncino, Memory Design Techniques for Low-Energy Embedded Systems, Kluwer Academic Publishers, 2002."},{"key":"e_1_3_2_1_12_1","first-page":"163","volume-title":"International Conference on Parallel Processing","author":"Lin C.","year":"1990","unstructured":"C. Lin , L. Snyder , \" A Comparison of Programming Models for Shared Memory Multiprocessors,\" International Conference on Parallel Processing , pp. 163 -- 170 , 1990 . C. Lin, L. Snyder, \"A Comparison of Programming Models for Shared Memory Multiprocessors,\" International Conference on Parallel Processing, pp. 163--170, 1990."},{"key":"e_1_3_2_1_13_1","first-page":"254","article-title":"Shared memory vs. message passing in shared-memory multiprocessors","author":"LeBlanc T.J.","year":"1992","unstructured":"T.J. LeBlanc , E.P. Markatos , \" Shared memory vs. message passing in shared-memory multiprocessors ,\" Symposium on Parallel and Distributed Processing , pp. 254 -- 263 , Dec. 1992 . T.J. LeBlanc, E.P. Markatos, \"Shared memory vs. message passing in shared-memory multiprocessors,\" Symposium on Parallel and Distributed Processing, pp. 254--263, Dec. 1992.","journal-title":"Symposium on Parallel and Distributed Processing"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/191995.192020"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/195473.195501"},{"key":"e_1_3_2_1_16_1","first-page":"189","article-title":"A comparative characterization of communication patterns in applications using MPI and shared memory on an IBM SPI","author":"Karlsson S.","year":"1998","unstructured":"S. Karlsson and M. Brorsson . \" A comparative characterization of communication patterns in applications using MPI and shared memory on an IBM SPI ,\" International.Workshop on Communication, Architecture, and Applications for Network-Based Parallel Computing , pp. 189 -- 201 , 1998 . S. Karlsson and M. Brorsson. \"A comparative characterization of communication patterns in applications using MPI and shared memory on an IBM SPI,\" International.Workshop on Communication, Architecture, and Applications for Network-Based Parallel Computing, pp. 189--201, 1998.","journal-title":"International.Workshop on Communication, Architecture, and Applications for Network-Based Parallel Computing"},{"key":"e_1_3_2_1_17_1","volume-title":"April","author":"Shan H.","year":"2001","unstructured":"H. Shan , J.P. Singh , L. Oliker , R. Biswas , \"Message passing vs. shared address space on a cluster of SMPs,\" International Parallel and Distributed Processing Symposium , April 2001 . H. Shan, J.P. Singh, L. Oliker, R. Biswas, \"Message passing vs. shared address space on a cluster of SMPs,\" International Parallel and Distributed Processing Symposium, April 2001."},{"key":"e_1_3_2_1_18_1","volume-title":"Parallel Computer Architecture: A Hardware\/Software Approach Morgan Kaufmann Publishers","author":"Culler D.E.","year":"1997","unstructured":"D.E. Culler , A. Gupta . J.P. Singh , Parallel Computer Architecture: A Hardware\/Software Approach Morgan Kaufmann Publishers , 1997 . D.E. Culler, A. Gupta. J.P. Singh, Parallel Computer Architecture: A Hardware\/Software Approach Morgan Kaufmann Publishers, 1997."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566471"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566471"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.148"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.55497"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.1994.363067"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/52.589244"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.5555\/580550.876432"},{"key":"e_1_3_2_1_26_1","first-page":"63","volume-title":"High Performance Memory Systems","author":"Saldanha C.","year":"2003","unstructured":"C. Saldanha and M. Lipasti , \" Power Efficient Cache Coherence \", High Performance Memory Systems , Springer-Verlag , 2003 , pp. 63 -- 78 . C. Saldanha and M. Lipasti, \"Power Efficient Cache Coherence\", High Performance Memory Systems, Springer-Verlag, 2003, pp. 63--78."},{"key":"e_1_3_2_1_27_1","first-page":"752","volume-title":"DATE'04: Design, Automation and Test in Europe","author":"Loghi M.","year":"2004","unstructured":"M. Loghi , F. Angiolini , D. Bertozzi , L. Benini , R. Zafalon , \"Analyzing On-Chip Communication in a MPSoC Environment \", DATE'04: Design, Automation and Test in Europe , February 2004 , pp. 752 -- 757 . M. Loghi, F. Angiolini, D. Bertozzi, L. Benini, R. Zafalon, \"Analyzing On-Chip Communication in a MPSoC Environment\", DATE'04: Design, Automation and Test in Europe, February 2004, pp. 752--757."},{"key":"e_1_3_2_1_28_1","unstructured":"Software ARM www.g141.com\/projects\/swarm.  Software ARM www.g141.com\/projects\/swarm."},{"key":"e_1_3_2_1_29_1","unstructured":"ARM Ltd. www.arm.com\/products\/solutions\/AMBAHomePage.html  ARM Ltd. www.arm.com\/products\/solutions\/AMBAHomePage.html"},{"key":"e_1_3_2_1_30_1","unstructured":"RTEMS home page www.rtems.com.  RTEMS home page www.rtems.com."},{"key":"e_1_3_2_1_31_1","first-page":"26","volume-title":"October 2001","author":"Benini L.","unstructured":"L. Benini power modeling and estimation framework for VLIW-based embedded systems,\" PATMOS'01 , October 2001 , pp. 26 -- 28 . L. Benini et al. \"A power modeling and estimation framework for VLIW-based embedded systems,\" PATMOS'01, October 2001, pp. 26--28."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/280756.280815"},{"key":"e_1_3_2_1_33_1","first-page":"318","volume-title":"DATE'04","author":"Bona A.","unstructured":"A. Bona , V. Zaccaria , R. Zafalon , \"System-Level Power Modeling and Simulation of High-End Industrial Network-on-chip\" , DATE'04 ,pp. 318 -- 323 . A. Bona, V. Zaccaria, R. Zafalon, \"System-Level Power Modeling and Simulation of High-End Industrial Network-on-chip\", DATE'04,pp. 318--323."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/130823.130824"}],"event":{"name":"GLSVLSI05: Great Lakes Symposium on VLSI 2005","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"Chicago Illinois USA","acronym":"GLSVLSI05"},"container-title":["Proceedings of the 15th ACM Great Lakes symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057728","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1057661.1057728","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:26:00Z","timestamp":1750281960000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1057661.1057728"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4,17]]},"references-count":33,"alternative-id":["10.1145\/1057661.1057728","10.1145\/1057661"],"URL":"https:\/\/doi.org\/10.1145\/1057661.1057728","relation":{},"subject":[],"published":{"date-parts":[[2005,4,17]]},"assertion":[{"value":"2005-04-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}