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In this work, we develop new datapath scheduling algorithms that use multiple supply voltages and dynamic frequency clocking in a coordinated manner in order to reduce the energy consumption of datapath circuits. In dynamic frequency clocking, the functional units can be operated at different frequencies depending on the computations occurring within the datapath during a given clock cycle. The strategy is to schedule high-energy units, such as multipliers at lower frequencies, so that they can be operated at lower voltages to reduce energy consumption and the low-energy units, such as adders at higher frequencies, to compensate for speed. The proposed time- and resource-constrained algorithms have been applied to various high-level synthesis benchmark circuits under different time and resource constraints. The experimental results show significant reduction in energy for both the algorithms.<\/jats:p>","DOI":"10.1145\/1059876.1059883","type":"journal-article","created":{"date-parts":[[2005,8,3]],"date-time":"2005-08-03T08:30:55Z","timestamp":1123057855000},"page":"330-353","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":19,"title":["Energy-efficient datapath scheduling using multiple voltages and dynamic clocking"],"prefix":"10.1145","volume":"10","author":[{"given":"Saraju P.","family":"Mohanty","sequence":"first","affiliation":[{"name":"University of North Texas, Denton, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Ranganathan","sequence":"additional","affiliation":[{"name":"University of South Florida, Tampa, FL"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,4]]},"reference":[{"volume-title":"Proceedings of the Design Automation and Test in Europe. 266--272","author":"Antola A.","key":"e_1_2_1_1_1","unstructured":"Antola , A. , Piuri , V. , and Sami , M . 1998. A low-redundancy approach to semi-concurrent error detection in datapaths . In Proceedings of the Design Automation and Test in Europe. 266--272 .]] Antola, A., Piuri, V., and Sami, M. 1998. A low-redundancy approach to semi-concurrent error detection in datapaths. In Proceedings of the Design Automation and Test in Europe. 266--272.]]"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.700720"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.795120"},{"volume-title":"Proceedings of the IEEE Custom Integrated Circuits Conference. 139--142","author":"Brynjolfson I.","key":"e_1_2_1_4_1","unstructured":"Brynjolfson , I. and Zilic , Z . 2000a. Dynamic clock management for low power applications in FPGAs . In Proceedings of the IEEE Custom Integrated Circuits Conference. 139--142 .]] Brynjolfson, I. and Zilic, Z. 2000a. Dynamic clock management for low power applications in FPGAs. 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