{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:55:10Z","timestamp":1750308910165,"version":"3.41.0"},"reference-count":15,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2005,5,1]],"date-time":"2005-05-01T00:00:00Z","timestamp":1114905600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2005,5]]},"abstract":"<jats:p>We present a customization framework for embedded processors which employs the utilization of application-specific information, thus specializing the processor's microarchitecture to the application needs. The increased processor utilization leads to a low-cost system implementation with no sacrifice in performance requirements and to reduced custom hardware in a typical SOC. We illustrate these ideas through the branch resolution problem, known to impose severe performance degradation on control-dominated embedded applications. A customization approach for early branch resolution and subsequent folding is presented. The application-specific information is captured by the microarchitecture through a low-cost reprogrammable hardware, thus attaining the twin benefits of processor standardization and application-specific customization. Experimental results show that for a representative set of control-dominated applications a reduction in the range of 3--22% in processor cycles can be achieved, thus extending the scope of low-cost embedded processors in complex codesigns for control intensive systems.<\/jats:p>","DOI":"10.1145\/1067915.1067924","type":"journal-article","created":{"date-parts":[[2005,8,2]],"date-time":"2005-08-02T08:38:10Z","timestamp":1122971890000},"page":"452-468","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["A reprogrammable customization framework for efficient branch resolution in embedded processors"],"prefix":"10.1145","volume":"4","author":[{"given":"Peter","family":"Petrov","sequence":"first","affiliation":[{"name":"University of Maryland, College Park, MD"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alex","family":"Orailoglu","sequence":"additional","affiliation":[{"name":"University of California, San Diego"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,5]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Tech. Rep. 1342","author":"Burger D.","year":"1997","unstructured":"Burger , D. and Austin , T. M . 1997 . The Simplescalar Tool Set, Version 2.0. Tech. Rep. 1342 , University of Wisconsin-Madison, CS Department . Burger, D. and Austin, T. M. 1997. The Simplescalar Tool Set, Version 2.0. Tech. Rep. 1342, University of Wisconsin-Madison, CS Department."},{"volume-title":"14th ISCA. 2--7. 10.1145\/30350.30351","author":"Ditzel D.","key":"e_1_2_1_2_1","unstructured":"Ditzel , D. and McLellan , H. 1987. Branch folding in the CRISP microprocessor: Reducing branch delay to zero . In 14th ISCA. 2--7. 10.1145\/30350.30351 Ditzel, D. and McLellan, H. 1987. Branch folding in the CRISP microprocessor: Reducing branch delay to zero. In 14th ISCA. 2--7. 10.1145\/30350.30351"},{"volume-title":"36th DAC. 253--257. 10.1145\/309847.309923","author":"Fisher J. A.","key":"e_1_2_1_3_1","unstructured":"Fisher , J. A. 1999. Customized instruction-sets for embedded processors . In 36th DAC. 253--257. 10.1145\/309847.309923 Fisher, J. A. 1999. Customized instruction-sets for embedded processors. In 36th DAC. 253--257. 10.1145\/309847.309923"},{"key":"e_1_2_1_4_1","doi-asserted-by":"crossref","unstructured":"Fisher J. A. Faraboschi P. and Desoli G. 1996. Custom-fit processors: Letting applications define architectures. In 29th MICRO. 324--335. Fisher J. A. Faraboschi P. and Desoli G. 1996. Custom-fit processors: Letting applications define architectures. In 29th MICRO. 324--335.","DOI":"10.1109\/MICRO.1996.566472"},{"key":"e_1_2_1_5_1","doi-asserted-by":"crossref","unstructured":"Gibbons P. B. and Muchnik S. S. 1986. Efficient instruction scheduling for a pipelined processor. In SIGPLAN. 11--16. 10.1145\/13310.13312 Gibbons P. B. and Muchnik S. S. 1986. Efficient instruction scheduling for a pipelined processor. In SIGPLAN. 11--16. 10.1145\/13310.13312","DOI":"10.1145\/13310.13312"},{"key":"e_1_2_1_6_1","doi-asserted-by":"crossref","unstructured":"Lam M. S. 1988. Software pipelining: An effective scheduling technique for VLIW processors. In SIGPLAN. 318--328. 10.1145\/53990.54022 Lam M. S. 1988. Software pipelining: An effective scheduling technique for VLIW processors. In SIGPLAN. 318--328. 10.1145\/53990.54022","DOI":"10.1145\/960116.54022"},{"key":"e_1_2_1_7_1","volume-title":"Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In 30th MICRO. 330--335.","author":"Lee C.","year":"1997","unstructured":"Lee , C. , Potkonjak , M. , and Mangione-Smith , W. H. 1997 . Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In 30th MICRO. 330--335. Lee, C., Potkonjak, M., and Mangione-Smith, W. H. 1997. Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. In 30th MICRO. 330--335."},{"key":"e_1_2_1_8_1","unstructured":"Lee L. H. Scott J. Moyer B. and Arends J. 1999. Low-cost branch folding for embedded applications with small tight loops. In 32nd MICRO. 103--111. Lee L. H. Scott J. Moyer B. and Arends J. 1999. Low-cost branch folding for embedded applications with small tight loops. In 32nd MICRO. 103--111."},{"volume-title":"Combining Branch Predictors","author":"McFarling S.","key":"e_1_2_1_9_1","unstructured":"McFarling , S. 1993. Combining Branch Predictors . Tech. Rep. TN-36, Western Research Laboratory, DEC. McFarling, S. 1993. Combining Branch Predictors. Tech. Rep. TN-36, Western Research Laboratory, DEC."},{"key":"e_1_2_1_10_1","doi-asserted-by":"crossref","unstructured":"Pan S. T. So K. and Rahmeh J. T. 1992. Improving the accuracy of dynamic branch prediction using branch correlation. In ASPLOS. 76--84. 10.1145\/143365.143490 Pan S. T. So K. and Rahmeh J. T. 1992. Improving the accuracy of dynamic branch prediction using branch correlation. In ASPLOS. 76--84. 10.1145\/143365.143490","DOI":"10.1145\/143371.143490"},{"key":"e_1_2_1_11_1","doi-asserted-by":"crossref","unstructured":"Petrov P. and Orailoglu A. 2001a. Data cache energy minimization through programmable tag size matching to the application. In ISSS. 113--117. 10.1145\/500001.500028 Petrov P. and Orailoglu A. 2001a. Data cache energy minimization through programmable tag size matching to the application. In ISSS. 113--117. 10.1145\/500001.500028","DOI":"10.1145\/500001.500028"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.959860"},{"key":"e_1_2_1_13_1","doi-asserted-by":"crossref","unstructured":"Sherwood T. and Calder B. 2001. Automated design of finite state machine predictors for customized processors. In 28th ISCA. 86--97. 10.1145\/379240.379254 Sherwood T. and Calder B. 2001. Automated design of finite state machine predictors for customized processors. In 28th ISCA. 86--97. 10.1145\/379240.379254","DOI":"10.1145\/384285.379254"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.293155"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/330249.330255"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1067915.1067924","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1067915.1067924","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:26:19Z","timestamp":1750281979000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1067915.1067924"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,5]]},"references-count":15,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2005,5]]}},"alternative-id":["10.1145\/1067915.1067924"],"URL":"https:\/\/doi.org\/10.1145\/1067915.1067924","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"type":"print","value":"1539-9087"},{"type":"electronic","value":"1558-3465"}],"subject":[],"published":{"date-parts":[[2005,5]]},"assertion":[{"value":"2005-05-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}