{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T08:16:06Z","timestamp":1759133766504,"version":"3.41.0"},"reference-count":23,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2005,11,1]],"date-time":"2005-11-01T00:00:00Z","timestamp":1130803200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGARCH Comput. Archit. News"],"published-print":{"date-parts":[[2005,11]]},"abstract":"<jats:p>Transaction processing has emerged as the killer application for commercial servers. Most servers are engaged in transactional workloads such as processing search requests, serving middleware, evaluating decisions, managing databases, and powering online commerce. Currently, commercial servers are built from one or more high-performance superscalar processors. However, commercial server applications exhibit high cache miss rates, large memory footprints, and low instruction level parallelism (ILP), which leads to poor utilization on traditional ILP-focused superscalar processors [11]. In addition, these ILP-focused processors have been primarily optimized to deliver maximum performance by employing high clock rates and large amounts of speculation. As a result, we are now at the point where the performance\/Watt of subsequent generations of traditional ILP-focused processors on server workloads has been flat [4] or even decreasing. The lack of increase in processor performance\/Watt, coupled with the continued decrease in server hardware acquisition costs and likely increases in future power and cooling costs is leading to a situation where total cost of server ownership will soon be predominately determined by power [4]. In this paper, we argue that attacking thread-level parallelism (TLP) via a large number of simple cores on a chip multiprocessor (CMP) leads to much better performance\/Watt for server workloads. As a case study, we compare Sun's TLP-oriented Niagara processor against the ILP-oriented dual-core Pentium Extreme Edition from Intel, showing that the Niagara processor has a significant performance\/Watt advantage for throughput-oriented server applications.<\/jats:p>","DOI":"10.1145\/1105734.1105737","type":"journal-article","created":{"date-parts":[[2006,2,6]],"date-time":"2006-02-06T18:14:10Z","timestamp":1139249650000},"page":"5-13","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":40,"title":["Performance\/Watt"],"prefix":"10.1145","volume":"33","author":[{"given":"James","family":"Laudon","sequence":"first","affiliation":[{"name":"Sun Microsystems"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,11]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.216748"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/279358.279363"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339696"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1095408.1095420"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.49"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996749"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2005.42"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/263580.263597"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5555\/545215.545218"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.35"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.446.0851"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/195473.195576"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/279358.279367"},{"volume-title":"14th Hot Chips","year":"2002","author":"Marr D.","key":"e_1_2_1_14_1"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/545215.545227"},{"volume-title":"February","year":"2003","author":"Mutlu O.","key":"e_1_2_1_16_1"},{"key":"e_1_2_1_17_1","first-page":"182","author":"Naffzigerl S.","year":"2005","journal-title":"\"The Implementation of a 2-core Multi-Threaded Itanium\u00ae Family Processor,\" IEEE Internation Solid-State Circuits Conference (ISSCC)"},{"first-page":"304","volume-title":"Feb. 2005","author":"Poirier C.","key":"e_1_2_1_18_1"},{"volume-title":"http:\/\/www.spec.org","author":"Standard Performance Evaluation Corporation","key":"e_1_2_1_19_1"},{"volume-title":"http:\/www.tpc.org","author":"Transaction Processing Performance Council","key":"e_1_2_1_20_1"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.224449"},{"key":"e_1_2_1_22_1","doi-asserted-by":"crossref","first-page":"87","DOI":"10.1109\/ISCA.2002.1003565","author":"Vijaykumar T.","year":"2002","journal-title":"\"Transient-Fault Recovery Using Simultaneous Multithreading,\" Proceedings of the 29th Annual International Symposium on Computer Architecture"},{"key":"e_1_2_1_23_1","unstructured":"\"XML Processing Performance in Java and .NET\" http:\/\/java.sun.com\/performance\/reference\/whitepapers\/XML_Test-1_0.pdf  \"XML Processing Performance in Java and .NET\" http:\/\/java.sun.com\/performance\/reference\/whitepapers\/XML_Test-1_0.pdf"}],"container-title":["ACM SIGARCH Computer Architecture News"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1105734.1105737","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1105734.1105737","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T16:08:03Z","timestamp":1750262883000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1105734.1105737"}},"subtitle":["the new server focus"],"short-title":[],"issued":{"date-parts":[[2005,11]]},"references-count":23,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2005,11]]}},"alternative-id":["10.1145\/1105734.1105737"],"URL":"https:\/\/doi.org\/10.1145\/1105734.1105737","relation":{},"ISSN":["0163-5964"],"issn-type":[{"type":"print","value":"0163-5964"}],"subject":[],"published":{"date-parts":[[2005,11]]},"assertion":[{"value":"2005-11-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}