{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,5]],"date-time":"2026-08-05T18:07:54Z","timestamp":1785953274426,"version":"3.56.0"},"reference-count":14,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2005,11,1]],"date-time":"2005-11-01T00:00:00Z","timestamp":1130803200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGARCH Comput. Archit. News"],"published-print":{"date-parts":[[2005,11]]},"abstract":"<jats:p>As memory accesses become slower with respect to the processor and consume more power with increasing memory size, the focus of memory performance and power consumption has become increasingly important. With the trend to develop multi-threaded, multi-core processors, the demands on the memory system will continue to scale. However, determining the optimal memory system configuration is non-trivial. The memory system performance is sensitive to a large number of parameters. Each of these parameters take on a number of values and interact in fashions that make overall trends difficult to discern. A comparison of the memory system architectures becomes even harder when we add the dimensions of power consumption and manufacturing cost. Unfortunately, there is a lack of tools in the public-domain that support such studies. Therefore, we introduce DRAMsim, a detailed and highly-configurable C-based memory system simulator to fill this gap. DRAMsim implements detailed timing models for a variety of existing memories, including SDRAM, DDR, DDR2, DRDRAM and FB-DIMM, with the capability to easily vary their parameters. It also models the power consumption of SDRAM and its derivatives. It can be used as a standalone simulator or as part of a more comprehensive system-level model. We have successfully integrated DRAMsim into a variety of simulators including MASE [15], Sim-alpha [14], BOCHS[2] and GEMS[13]. The simulator can be downloaded from www.ece.umd.edu\/dramsim.<\/jats:p>","DOI":"10.1145\/1105734.1105748","type":"journal-article","created":{"date-parts":[[2006,2,6]],"date-time":"2006-02-06T18:14:10Z","timestamp":1139249650000},"page":"100-107","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":248,"title":["DRAMsim"],"prefix":"10.1145","volume":"33","author":[{"given":"David","family":"Wang","sequence":"first","affiliation":[{"name":"University of Maryland, College Park"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Brinda","family":"Ganesh","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nuengwong","family":"Tuaycharoen","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kathleen","family":"Baynes","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Aamer","family":"Jaleel","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bruce","family":"Jacob","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2005,11]]},"reference":[{"key":"e_1_2_1_1_1","first-page":"141","volume-title":"MA","author":"Gurumurthi S.","year":"2002","unstructured":"S. Gurumurthi , A. Sivasubramaniam , M. J. Irwin , N. Vijaykrishnan , M. Kandemir , T. Li , L. K. John , \" Using Complete Machine Simulation for Software Power Estimation : The SoftWatt Approach,\" In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA-8), Cambridge , MA , pages 141 -- 150 , February , 2002 . S. Gurumurthi, A. Sivasubramaniam, M. J. Irwin, N. Vijaykrishnan, M. Kandemir, T. Li, L. K. John, \"Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach,\" In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA-8), Cambridge, MA, pages 141--150, February, 2002."},{"key":"e_1_2_1_2_1","unstructured":"The Bochs IA-32 Emulator Project. http:\/\/bochs.source-forge.net  The Bochs IA-32 Emulator Project. http:\/\/bochs.source-forge.net"},{"key":"e_1_2_1_4_1","unstructured":"G. Ganger B. Worthington and Y. Patt \"The DiskSim Simulation Environment Version 2 0 Reference Manual \" http:\/\/www.ece.cmu.edu\/ ganger\/disksim\/.  G. Ganger B. Worthington and Y. Patt \"The DiskSim Simulation Environment Version 2 0 Reference Manual \" http:\/\/www.ece.cmu.edu\/ ganger\/disksim\/."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859638"},{"key":"e_1_2_1_7_1","unstructured":"Jeff Janzen The Micron System-Power Calculator. http:\/\/www.micron.com\/products\/dram\/syscalc.html  Jeff Janzen The Micron System-Power Calculator. http:\/\/www.micron.com\/products\/dram\/syscalc.html"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339657"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379252"},{"key":"e_1_2_1_10_1","volume-title":"Low-power design of memory intensive functions,\" Proceedings of the IEEE Symposium on Low Power Electronics (Sept.)","author":"Lidsky D.","year":"1994","unstructured":"D. Lidsky and J. Rabaey , \" Low-power design of memory intensive functions,\" Proceedings of the IEEE Symposium on Low Power Electronics (Sept.) , IEEE Computer Society Press , Los Alamitos, CA , 16--17, 1994 . D. Lidsky and J. Rabaey, \"Low-power design of memory intensive functions,\" Proceedings of the IEEE Symposium on Low Power Electronics (Sept.), IEEE Computer Society Press, Los Alamitos, CA, 16--17, 1994."},{"key":"e_1_2_1_11_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4757-2849-1","volume-title":"Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design,\" Kluwer Academic","author":"Catthoor F.","year":"1998","unstructured":"F. Catthoor , S. Wuytack , E. De Greef , F. Balasa , L. Nachtergaele , and A. Vandecappelle , \" Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design,\" Kluwer Academic , Dordrecht, Netherlands , 1998 a. F. Catthoor, S. Wuytack, E. De Greef, F. Balasa, L. Nachtergaele, and A. Vandecappelle, \"Custom Memory Management Methodology: Exploration of Memory Organization for Embedded Multimedia System Design,\" Kluwer Academic, Dordrecht, Netherlands, 1998a."},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1105734.1105747"},{"key":"e_1_2_1_14_1","volume-title":"Execution-Driven Alpha 21264 Simulator.\"","author":"Desikan R.","unstructured":"R. Desikan , D. C. Burger , S. W. Keckler , and Todd Austin . \"Sim-alpha : a Validated , Execution-Driven Alpha 21264 Simulator.\" , The University of Texas at Austin, Department of Computer Sciences . Technical Report TR-01-23. R. Desikan, D. C. Burger, S. W. Keckler, and Todd Austin. \"Sim-alpha: a Validated, Execution-Driven Alpha 21264 Simulator.\", The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-01-23."},{"key":"e_1_2_1_15_1","volume-title":"Nov.","author":"Larson Eric","year":"2001","unstructured":"Eric Larson , Saugata Chatterjee , and Todd Austin , \"MASE : A Novel Infrastructure for Detailed Micro architectural Modeling,\" In the 2001 International Symposium on Performance Analysis of Systems and Software , Nov. 2001 . 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