{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:42:36Z","timestamp":1750308156503,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":16,"publisher":"ACM","license":[{"start":{"date-parts":[[2006,2,22]],"date-time":"2006-02-22T00:00:00Z","timestamp":1140566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,2,22]]},"DOI":"10.1145\/1117201.1117211","type":"proceedings-article","created":{"date-parts":[[2006,5,8]],"date-time":"2006-05-08T21:40:43Z","timestamp":1147124443000},"page":"63-72","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["Design, implementation, and verification of active cache emulator (ACE)"],"prefix":"10.1145","author":[{"given":"Jumnit","family":"Hong","sequence":"first","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}]},{"given":"Eriko","family":"Nurvitadhi","sequence":"additional","affiliation":[{"name":"Carnegie Mellon University, Pittsburgh, PA"}]},{"given":"Shih-Lien L.","family":"Lu","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}]}],"member":"320","published-online":{"date-parts":[[2006,2,22]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.347997"},{"volume-title":"October 27, 2003.","author":"Chalainanont N.","key":"e_1_3_2_1_2_1"},{"key":"e_1_3_2_1_3_1","first-page":"128","volume-title":"Proc. of the 6th International Conference on Modeling Techniques and Tools for Computer Performance Evaluation, Edinburgh U.K.","author":"Flanagan J. K.","year":"1992"},{"key":"e_1_3_2_1_4_1","first-page":"443","volume-title":"Elsevier Science","author":"Grimsrud K.","year":"1993"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.16187"},{"key":"e_1_3_2_1_6_1","unstructured":"Intel VTune Performance Analyzer http:\/\/www.intel.com\/cd\/software\/products\/asmo-na\/eng\/vtune\/vpa\/219637.htm  Intel VTune Performance Analyzer http:\/\/www.intel.com\/cd\/software\/products\/asmo-na\/eng\/vtune\/vpa\/219637.htm"},{"volume-title":"Proc. of FPL 2003","year":"2003","author":"Lu S.-L.","key":"e_1_3_2_1_7_1"},{"key":"e_1_3_2_1_8_1","unstructured":"S. Manegold. Cache Calibrator v.0.9e. http:\/\/www.cwi.nl\/~manegold\/Calibrator\/.  S. Manegold. Cache Calibrator v.0.9e. http:\/\/www.cwi.nl\/~manegold\/Calibrator\/."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/378993.378999"},{"key":"e_1_3_2_1_10_1","unstructured":"Pentium Pro Family Developer's Manual Volume 1: Specifications. Intel Corp. 1996.  Pentium Pro Family Developer's Manual Volume 1: Specifications. Intel Corp. 1996."},{"key":"e_1_3_2_1_11_1","unstructured":"RightMark Memory Analyzer Website http:\/\/cpu.rightmark.org\/products\/rmma.shtml  RightMark Memory Analyzer Website http:\/\/cpu.rightmark.org\/products\/rmma.shtml"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605403"},{"key":"e_1_3_2_1_13_1","unstructured":"SimPoint Website http:\/\/www.cs.ucsd.edu\/~calder\/simpoint\/  SimPoint Website http:\/\/www.cs.ucsd.edu\/~calder\/simpoint\/"},{"key":"e_1_3_2_1_14_1","unstructured":"Standard Performance Evaluation Corporation (SPEC) Website http:\/\/www.specbench.org\/  Standard Performance Evaluation Corporation (SPEC) Website http:\/\/www.specbench.org\/"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/862895.883871"},{"key":"e_1_3_2_1_16_1","first-page":"552","volume-title":"Proc. of High Performance Computing Asia '97","author":"Yoon H.","year":"1997"}],"event":{"name":"FPGA06: ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA06"},"container-title":["Proceedings of the 2006 ACM\/SIGDA 14th international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1117201.1117211","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1117201.1117211","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T16:18:54Z","timestamp":1750263534000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1117201.1117211"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,2,22]]},"references-count":16,"alternative-id":["10.1145\/1117201.1117211","10.1145\/1117201"],"URL":"https:\/\/doi.org\/10.1145\/1117201.1117211","relation":{},"subject":[],"published":{"date-parts":[[2006,2,22]]},"assertion":[{"value":"2006-02-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}