{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,21]],"date-time":"2026-04-21T20:35:43Z","timestamp":1776803743239,"version":"3.51.2"},"reference-count":10,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2005,4,1]],"date-time":"2005-04-01T00:00:00Z","timestamp":1112313600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGBED Rev."],"published-print":{"date-parts":[[2005,4]]},"abstract":"<jats:p>The usage of cache memories in time-critical applications has been limited as caches introduce unpredictable execution behavior. Cache partitioning techniques have been developed to reduce the impact of unpredictability owing to context switch effects. However, partitioning reduces the cache size available for each task resulting in capacity related cache misses. This paper introduces a fully associative cache architecture for multi-tasking applications where effective partition sizes are increased by tag compression in the cache. The proposed scheme uses a few don't care cells in its least significant bits of the tag to aggregate multiple tag entries into a single entry. The experimental results indicate that the proposed scheme is context switch resilient when eight different real-time benchmarks use the cache concurrently. Further, this cache architecture requires less time and less energy to perform tag table search compared to contemporary fully associative caches of the same size.<\/jats:p>","DOI":"10.1145\/1121788.1121799","type":"journal-article","created":{"date-parts":[[2007,1,17]],"date-time":"2007-01-17T18:32:02Z","timestamp":1169058722000},"page":"35-38","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["Fully associative cache partitioning with don't care bits for real-time applications"],"prefix":"10.1145","volume":"2","author":[{"given":"Ali","family":"Chousein","sequence":"first","affiliation":[{"name":"Department of Computer Science, Texas A&amp;M University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rabi N.","family":"Mahapatra","sequence":"additional","affiliation":[{"name":"Department of Computer Science, Texas A&amp;M University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,4]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.1989.63574"},{"key":"e_1_2_1_2_1","first-page":"174","volume-title":"Workshop on Responsive Computer Systems","author":"Wolfe A.","year":"1993","unstructured":"{2} A. Wolfe , \" Software-Based Cache Partitioning for Real-Time Applications\" , Workshop on Responsive Computer Systems , 1993 , pp. 174 - 180 . {2} A. Wolfe, \"Software-Based Cache Partitioning for Real-Time Applications\", Workshop on Responsive Computer Systems, 1993, pp. 174-180."},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/216636.216677"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/523983.828369"},{"key":"e_1_2_1_5_1","volume-title":"Proceedings of the ACM SIGPLAN Workshop on Language, Compiler and Tool Support for Real-Time Systems","author":"Basumallick Swagato","year":"1994","unstructured":"{5} Swagato Basumallick and Kevin D . Nilsen, \"Cache Issues in Real-Time Systems \", Proceedings of the ACM SIGPLAN Workshop on Language, Compiler and Tool Support for Real-Time Systems , 1994 . {5} Swagato Basumallick and Kevin D. Nilsen, \"Cache Issues in Real-Time Systems\", Proceedings of the ACM SIGPLAN Workshop on Language, Compiler and Tool Support for Real-Time Systems, 1994."},{"key":"e_1_2_1_6_1","unstructured":"{6} Intel \"Intel\u00ae XScaleTM Core Developer's Manual\" 2000.  {6} Intel \"Intel\u00ae XScaleTM Core Developer's Manual\" 2000."},{"key":"e_1_2_1_7_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-642-83056-3","volume-title":"Content-Addressable Memories","author":"Kohonen T.","year":"1987","unstructured":"{7} T. Kohonen , Content-Addressable Memories , Second Edition, Springer-Verlag , 1987 . {7} T. Kohonen, Content-Addressable Memories, Second Edition, Springer-Verlag, 1987."},{"key":"e_1_2_1_9_1","unstructured":"{9} http:\/\/archi.snu.ac.kr\/realtime\/benchmark\/  {9} http:\/\/archi.snu.ac.kr\/realtime\/benchmark\/"},{"key":"e_1_2_1_10_1","unstructured":"{10} http:\/\/research.compaq.com\/wrl\/people\/jouppi\/CACTI. html  {10} http:\/\/research.compaq.com\/wrl\/people\/jouppi\/CACTI. html"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/998680.1006719"}],"container-title":["ACM SIGBED Review"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1121788.1121799","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1121788.1121799","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T16:08:36Z","timestamp":1750262916000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1121788.1121799"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,4]]},"references-count":10,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2005,4]]}},"alternative-id":["10.1145\/1121788.1121799"],"URL":"https:\/\/doi.org\/10.1145\/1121788.1121799","relation":{},"ISSN":["1551-3688"],"issn-type":[{"value":"1551-3688","type":"electronic"}],"subject":[],"published":{"date-parts":[[2005,4]]},"assertion":[{"value":"2005-04-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}