{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:42:17Z","timestamp":1750308137486,"version":"3.41.0"},"reference-count":50,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2005,10,1]],"date-time":"2005-10-01T00:00:00Z","timestamp":1128124800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGBED Rev."],"published-print":{"date-parts":[[2005,10]]},"abstract":"<jats:p>Embedded systems are emerging as an essential component of modern electronic products. Embedded system design problems are posing challenges that involve entirely new skills for engineers. These skills are related to the combination of traditionally disjoint engineering disciplines. There is a shared concern that today's educational systems are not providing the appropriate foundations for embedded systems. We believe a new education paradigm is needed.We will argue this point using the example of an emerging curriculum on embedded systems at the University of California at Berkeley. This curriculum is the result of a distillation process of more than ten years of intense research work. We will present the considerations that are driving the curriculum development and we review our undergraduate and graduate program. In particular, we describe in detail a graduate class (EECS249: Design of Embedded Systems: Modeling, Validation and Synthesis) that has been taught for six years. A common feature of our education agenda is the search for fundamentals of embedded system science rather than embedded system design techniques, an approach that today is rather unique.<\/jats:p>","DOI":"10.1145\/1121812.1121815","type":"journal-article","created":{"date-parts":[[2007,1,17]],"date-time":"2007-01-17T18:32:02Z","timestamp":1169058722000},"page":"5-14","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Embedded system education"],"prefix":"10.1145","volume":"2","author":[{"given":"Alberto Luigi","family":"Sangiovanni-Vincentelli","sequence":"first","affiliation":[{"name":"University of California at Berkeley"}]},{"given":"Alessandro","family":"Pinto","sequence":"additional","affiliation":[{"name":"University of California at Berkeley"}]}],"member":"320","published-online":{"date-parts":[[2005,10]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"{1} Artist \"http:\/\/www.artist-embedded.org\/overview\/.\"]] {1} Artist \"http:\/\/www.artist-embedded.org\/overview\/.\"]]"},{"key":"e_1_2_1_2_1","volume-title":"Polis: A Design Environment for Control-Dominated Embedded Systems","author":"F.","year":"1997","unstructured":"{2} F. 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IEEE Computer Society Press , 1988 , pp. 330 - 339 .]] {6} S. Borkar, R. Cohn, G. Cox, S. Gleason, and T. Gross, \"Warp: an integrated solution of high-speed parallel computing,\" in Supercomputing '88: Proceedings of the 1988 ACM\/IEEE conference on Supercomputing. IEEE Computer Society Press, 1988, pp. 330-339.]]"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270347"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"e_1_2_1_9_1","first-page":"605","volume-title":"10th International Workshop on Field-Programmable Logic and Applications. Springer-Verlag","author":"Caspi E.","year":"2000","unstructured":"{9} E. Caspi , M. Chu , R. Huang , J. Yeh , J. Wawrzynek , and A. DeHon , \" Stream computations organized for reconfigurable execution (score),\" in FPL '00: Proceedings of the The Roadmap to Reconfigurable Computing , 10th International Workshop on Field-Programmable Logic and Applications. Springer-Verlag , 2000 , pp. 605 - 614 .]] {9} E. Caspi, M. Chu, R. Huang, J. Yeh, J. Wawrzynek, and A. DeHon, \"Stream computations organized for reconfigurable execution (score),\" in FPL '00: Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications. 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B.","year":"1999","unstructured":"{20} F. B. et. al. , \" Synthesis of software programs for embedded control application ,\" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , June 1999 .]] {20} F. B. et. al., \"Synthesis of software programs for embedded control application,\" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, June 1999.]]","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"e_1_2_1_21_1","first-page":"16","volume-title":"On predicting data cache behavior for real-time systems,\" in Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems","author":"Ferdinand C.","year":"1998","unstructured":"{21} C. Ferdinand and R. Wilhelm , \" On predicting data cache behavior for real-time systems,\" in Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems . 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Elsevier, 2002.]]"},{"key":"e_1_2_1_27_1","unstructured":"{27} IXP1200 \" http:\/\/www.intel.com\/design\/network\/products\/npfamily\/ixp1200.htm.\"]] {27} IXP1200 \" http:\/\/www.intel.com\/design\/network\/products\/npfamily\/ixp1200.htm.\"]]"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.248873"},{"key":"e_1_2_1_29_1","volume-title":"Distributed localized algorithms and protocols for power minimization in networked embedded systems,\" in ACM\/IEEE International Symposium On Low Power Electronics and Design","author":"Koushanfar F.","year":"2003","unstructured":"{29} F. Koushanfar , A. Davare , D. T. Nguyen , M. Potkonjak , and A. Sangiovanni-Vincentelli , \" Distributed localized algorithms and protocols for power minimization in networked embedded systems,\" in ACM\/IEEE International Symposium On Low Power Electronics and Design , 2003 .]] {29} F. Koushanfar, A. Davare, D. T. Nguyen, M. Potkonjak, and A. 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Passerone , \"Semantic foundations for heterogeneous systems,\" Ph. D. dissertation , University of California , Berkeley , 2004 .]] {40} R. Passerone, \"Semantic foundations for heterogeneous systems,\" Ph.D. dissertation, University of California, Berkeley, 2004.]]"},{"key":"e_1_2_1_41_1","unstructured":"{41} PATH \"http:\/\/www.path.berkeley.edu\/.\"]] {41} PATH \"http:\/\/www.path.berkeley.edu\/.\"]]"},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514114"},{"key":"e_1_2_1_43_1","doi-asserted-by":"crossref","unstructured":"{43} A. Pnueli \"The temporal logic of programs \" in Proceedings of the 18th IEEE Symposium on the Foundations of Computer Science (FOCS-77) IEEE. Providence Rhode Island: IEEE Computer Society Press Oct. 31-Nov. 2 1977 pp. 46-57.]] {43} A. Pnueli \"The temporal logic of programs \" in Proceedings of the 18th IEEE Symposium on the Foundations of Computer Science (FOCS-77) IEEE. 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