{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,5]],"date-time":"2026-05-05T07:22:23Z","timestamp":1777965743897,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":27,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,3,29]]},"DOI":"10.1145\/1122971.1123003","type":"proceedings-article","created":{"date-parts":[[2006,5,8]],"date-time":"2006-05-08T21:40:43Z","timestamp":1147124443000},"page":"209-220","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":123,"title":["Hybrid transactional memory"],"prefix":"10.1145","author":[{"given":"Sanjeev","family":"Kumar","sequence":"first","affiliation":[{"name":"Intel Labs, Santa Clara, CA"}]},{"given":"Michael","family":"Chu","sequence":"additional","affiliation":[{"name":"University of Michigan, Ann Arbor"}]},{"given":"Christopher J.","family":"Hughes","sequence":"additional","affiliation":[{"name":"Intel Labs, Santa Clara, CA"}]},{"given":"Partha","family":"Kundu","sequence":"additional","affiliation":[{"name":"Intel Labs, Santa Clara, CA"}]},{"given":"Anthony","family":"Nguyen","sequence":"additional","affiliation":[{"name":"Intel Labs, Santa Clara, CA"}]}],"member":"320","published-online":{"date-parts":[[2006,3,29]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.41"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/140901.140919"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.363382"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/781131.781169"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.509907"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/822080.822797"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.5555\/822079.822729"},{"key":"e_1_3_2_1_8_1","volume-title":"Transaction Processing: Concepts and Techniques","author":"Gray J.","year":"1992","unstructured":"J. Gray and A. Reuter . Transaction Processing: Concepts and Techniques . Morgan Kaufmann Publishers Inc ., 1992 . J. Gray and A. Reuter. Transaction Processing: Concepts and Techniques. Morgan Kaufmann Publishers Inc., 1992."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073814.1073863"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291020"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/998680.1006711"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/949305.949340"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065944.1065952"},{"key":"e_1_3_2_1_14_1","volume-title":"Transactional memory. PLDI' 05 Keynote Address","author":"Herlihy M.","year":"2005","unstructured":"M. Herlihy . Transactional memory. PLDI' 05 Keynote Address , 2005 . M. Herlihy. Transactional memory. PLDI' 05 Keynote Address, 2005."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/872035.872048"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165164"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605400"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/103727.103729"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598134"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379264"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605399"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.54"},{"key":"e_1_3_2_1_23_1","author":"Rajwar R.","year":"2005","unstructured":"R. Rajwar and M. Hill . http:\/\/www.cs.wisc.edu\/trans-memory\/biblio\/. Transactional Memory Bibliography , 2005 . R. Rajwar and M. Hill. http:\/\/www.cs.wisc.edu\/trans-memory\/biblio\/. Transactional Memory Bibliography, 2005.","journal-title":"http:\/\/www.cs.wisc.edu\/trans-memory\/biblio\/. Transactional Memory Bibliography"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073814.1073861"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/224964.224987"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.224451"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339650"}],"event":{"name":"PPoPP06: ACM SIGPLAN 2006 Symposium on Principles and Practice of Parallel Programming 2006","location":"New York New York USA","acronym":"PPoPP06","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","ACM Association for Computing Machinery"]},"container-title":["Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1122971.1123003","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,11]],"date-time":"2023-01-11T10:54:49Z","timestamp":1673434489000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1122971.1123003"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,3,29]]},"references-count":27,"alternative-id":["10.1145\/1122971.1123003","10.1145\/1122971"],"URL":"https:\/\/doi.org\/10.1145\/1122971.1123003","relation":{},"subject":[],"published":{"date-parts":[[2006,3,29]]},"assertion":[{"value":"2006-03-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}