{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,4]],"date-time":"2023-09-04T20:33:25Z","timestamp":1693859605788},"reference-count":5,"publisher":"Association for Computing Machinery (ACM)","issue":"5","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGARCH Comput. Archit. News"],"published-print":{"date-parts":[[2005,12]]},"abstract":"<jats:p>In this paper we describe how we have used Pin to generate a multithreaded reference stream for simulation of a multiprocessor on a uniprocessor. We have taken special care to model as accurately as possible the effects of cache coherence protocol state, and lock and barrier synchronization on the performance of multithreaded applications running on multiprocessor hardware.We first describe a simplified version of the algorithm, which uses semaphores to synchronize instrumented application threads and the simulator. We then describe modifications to that algorithm to model the microarchitectural features of the Itanium2 that affect the timing of memory reference issue. An experimental evaluation determines that, while our methods enable accurate simulation, the use of semaphores has negative impact on the performance of the simulator.<\/jats:p>","DOI":"10.1145\/1127577.1127586","type":"journal-article","created":{"date-parts":[[2006,5,8]],"date-time":"2006-05-08T22:51:53Z","timestamp":1147128713000},"page":"39-44","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["Using Pin as a memory reference generator for multiprocessor simulation"],"prefix":"10.1145","volume":"33","author":[{"given":"Collin","family":"McCurdy","sequence":"first","affiliation":[{"name":"University of Wisconsin--Madison"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Charles","family":"Fischer","sequence":"additional","affiliation":[{"name":"University of Wisconsin--Madison"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2005,12]]},"reference":[{"key":"e_1_2_1_1_1","first-page":"43","volume-title":"Programming Languages","author":"Dijkstra E.","year":"1968"},{"key":"e_1_2_1_2_1","volume-title":"Futexes and Furwocks: Fast Userlevel Locking in Linux. In Proceedings of the Ottawa Linux Symposium","author":"Franke H.","year":"2002"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065034"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2003.1196114"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2002.1011412"}],"container-title":["ACM SIGARCH Computer Architecture News"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1127577.1127586","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,28]],"date-time":"2022-12-28T21:23:25Z","timestamp":1672262605000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1127577.1127586"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,12]]},"references-count":5,"journal-issue":{"issue":"5","published-print":{"date-parts":[[2005,12]]}},"alternative-id":["10.1145\/1127577.1127586"],"URL":"https:\/\/doi.org\/10.1145\/1127577.1127586","relation":{},"ISSN":["0163-5964"],"issn-type":[{"value":"0163-5964","type":"print"}],"subject":[],"published":{"date-parts":[[2005,12]]},"assertion":[{"value":"2005-12-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}