{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:39:51Z","timestamp":1750307991791,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":20,"publisher":"ACM","license":[{"start":{"date-parts":[[2006,5,3]],"date-time":"2006-05-03T00:00:00Z","timestamp":1146614400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,5,3]]},"DOI":"10.1145\/1128022.1128065","type":"proceedings-article","created":{"date-parts":[[2006,5,8]],"date-time":"2006-05-08T21:40:43Z","timestamp":1147124443000},"page":"321-330","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["An efficient cache design for scalable glueless shared-memory multiprocessors"],"prefix":"10.1145","author":[{"given":"Alberto","family":"Ros","sequence":"first","affiliation":[{"name":"Universidad de Murcia, Murcia, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Manuel E.","family":"Acacio","sequence":"additional","affiliation":[{"name":"Universidad de Murcia, Murcia, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jos\u00e9 M.","family":"Garc\u00eda","sequence":"additional","affiliation":[{"name":"Universidad de Murcia, Murcia, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2006,5,3]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"crossref","first-page":"155","DOI":"10.1109\/PACT.2002.1106014","volume-title":"11th Int'l Conference on Parallel Architectures and Compilation Techniques (PACT","author":"Acacio M.","year":"2002"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_2_1","DOI":"10.1109\/TPDS.2004.27"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1109\/TPDS.2005.4"},{"volume-title":"14th HotChips Symposium","year":"2002","author":"Ahmed A.","key":"e_1_3_2_1_4_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_5_1","DOI":"10.1145\/169627.169724"},{"key":"e_1_3_2_1_6_1","first-page":"312","volume-title":"Int'l Conference on Parallel Processing (ICPP'90)","author":"Gupta A.","year":"1990"},{"issue":"14","key":"e_1_3_2_1_7_1","first-page":"12","volume":"12","author":"Gwennap L.","year":"1998","journal-title":"Ease Memory Bottleneck. Microprocessor Report"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1109\/2.707614"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"crossref","first-page":"152","DOI":"10.1109\/HPCA.1999.744357","volume-title":"5th Int'l Symposium on High-Performance Computer Architecture (HPCA-5)","author":"Iyer R.","year":"1999"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.1109\/2.121510"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1145\/232973.233006"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_12_1","DOI":"10.1145\/859618.859640"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1145\/378993.378998"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"crossref","first-page":"251","DOI":"10.1109\/HPCA.2002.995715","volume-title":"8th Int'l Symposium on High Performance Computer Architecture (HPCA-8)","author":"Martin M.","year":"2002"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_15_1","DOI":"10.1109\/ISCA.2005.42"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_16_1","DOI":"10.1145\/209936.209945"},{"key":"e_1_3_2_1_17_1","first-page":"145","volume-title":"6th Int'l Symposium on High-Performance Computer Architecture (HPCA-6)","author":"Nanda A.","year":"2000"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_18_1","DOI":"10.1007\/11549468_65"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_19_1","DOI":"10.1145\/223982.223990"},{"volume-title":"Inc.","year":"2003","author":"Woodacre M.","key":"e_1_3_2_1_20_1"}],"event":{"sponsor":["ACM Association for Computing Machinery","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"acronym":"CF06","name":"CF06: Computing Frontiers Conference","location":"Ischia Italy"},"container-title":["Proceedings of the 3rd conference on Computing frontiers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1128022.1128065","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1128022.1128065","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T15:06:16Z","timestamp":1750259176000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1128022.1128065"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,5,3]]},"references-count":20,"alternative-id":["10.1145\/1128022.1128065","10.1145\/1128022"],"URL":"https:\/\/doi.org\/10.1145\/1128022.1128065","relation":{},"subject":[],"published":{"date-parts":[[2006,5,3]]},"assertion":[{"value":"2006-05-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}