{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:39:50Z","timestamp":1750307990611,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":23,"publisher":"ACM","license":[{"start":{"date-parts":[[2006,5,3]],"date-time":"2006-05-03T00:00:00Z","timestamp":1146614400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,5,3]]},"DOI":"10.1145\/1128022.1128068","type":"proceedings-article","created":{"date-parts":[[2006,5,8]],"date-time":"2006-05-08T21:40:43Z","timestamp":1147124443000},"page":"341-352","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["Simple penalty-sensitive replacement policies for caches"],"prefix":"10.1145","author":[{"given":"Jaeheon","family":"Jeong","sequence":"first","affiliation":[{"name":"Intel, Hillsboro, OR"}]},{"given":"Per","family":"Stenstr\u00f6m","sequence":"additional","affiliation":[{"name":"Chalmers University of Technology Gothenburg, SWEDEN"}]},{"given":"Michel","family":"Dubois","sequence":"additional","affiliation":[{"name":"University of Southern California, Los Angeles, CA"}]}],"member":"320","published-online":{"date-parts":[[2006,5,3]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_3_2_1_1_1","DOI":"10.5555\/255235.255275"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_4_1","DOI":"10.5555\/320080.320100"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_5_1","DOI":"10.5555\/144953.145006"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1145\/224538.224622"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_7_1","DOI":"10.1145\/305619.305636"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_9_1","DOI":"10.5555\/822080.822804"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.5555\/266800.266806"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1145\/165123.165154"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_12_1","DOI":"10.5555\/520549.822758"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1145\/339647.339669"},{"key":"e_1_3_2_1_14_1","volume-title":"Proceedings of International Conference on Parallel Processing","author":"Mounes-Toussi F.","year":"1998","unstructured":"Mounes-Toussi , F. , and Lilja , D ., The Effect of Using State-Based Priority Information in a Shared-Memory Multiprocessor Cache Replacement Policy . In Proceedings of International Conference on Parallel Processing , Aug. 1998 , 217--224. Mounes-Toussi, F., and Lilja, D., The Effect of Using State-Based Priority Information in a Shared-Memory Multiprocessor Cache Replacement Policy. In Proceedings of International Conference on Parallel Processing, Aug. 1998, 217--224."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_16_1","DOI":"10.1145\/279358.279386"},{"key":"e_1_3_2_1_17_1","volume-title":"Nov.","author":"Seznec A.","year":"1995","unstructured":"Seznec , A. , and Lloansi , F. , About Effective Cache Miss Penalty on Out-of-Order Superscalar Processors. IRISA Report #970 , Nov. 1995 . Seznec, A., and Lloansi, F., About Effective Cache Miss Penalty on Out-of-Order Superscalar Processors. IRISA Report #970, Nov. 1995."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_18_1","DOI":"10.5555\/548716.822692"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_19_1","DOI":"10.1145\/356887.356892"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_20_1","DOI":"10.1109\/12.2208"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_21_1","DOI":"10.1145\/379240.379258"},{"unstructured":"Standard Performance Evaluation Corporation http:\/\/ www.specbench.org.  Standard Performance Evaluation Corporation http:\/\/ www.specbench.org.","key":"e_1_3_2_1_22_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_23_1","DOI":"10.1145\/165123.165147"},{"key":"e_1_3_2_1_24_1","volume-title":"High-Performance Computer Architecture","author":"Stone H.","year":"1990","unstructured":"Stone , H. , High-Performance Computer Architecture . 2 nd Edition, Addison-Wesley Publishing Company , Nov. 1990 . Stone, H., High-Performance Computer Architecture. 2nd Edition, Addison-Wesley Publishing Company, Nov. 1990.","edition":"2"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_25_1","DOI":"10.5555\/225160.225177"},{"key":"e_1_3_2_1_26_1","volume-title":"Proceedings of the 6th International Symposium on High-Performance Computer Architecture","author":"Wong W.","year":"2000","unstructured":"Wong , W. , and Baer , J ., Modified LRU Policies for Improving Second-Level Cache Behavior . In Proceedings of the 6th International Symposium on High-Performance Computer Architecture , Jan. 2000 , 49--60. Wong, W., and Baer, J., Modified LRU Policies for Improving Second-Level Cache Behavior. In Proceedings of the 6th International Symposium on High-Performance Computer Architecture, Jan. 2000, 49--60."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_27_1","DOI":"10.1145\/139669.139709"}],"event":{"sponsor":["ACM Association for Computing Machinery","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"acronym":"CF06","name":"CF06: Computing Frontiers Conference","location":"Ischia Italy"},"container-title":["Proceedings of the 3rd conference on Computing frontiers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1128022.1128068","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1128022.1128068","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T15:06:16Z","timestamp":1750259176000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1128022.1128068"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2006,5,3]]},"references-count":23,"alternative-id":["10.1145\/1128022.1128068","10.1145\/1128022"],"URL":"https:\/\/doi.org\/10.1145\/1128022.1128068","relation":{},"subject":[],"published":{"date-parts":[[2006,5,3]]},"assertion":[{"value":"2006-05-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}