{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T18:41:28Z","timestamp":1730313688518,"version":"3.28.0"},"publisher-location":"New York, NY, USA","reference-count":12,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,8,28]]},"DOI":"10.1145\/1150343.1150390","type":"proceedings-article","created":{"date-parts":[[2006,10,18]],"date-time":"2006-10-18T22:04:00Z","timestamp":1161209040000},"page":"179-183","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["ByZFAD"],"prefix":"10.1145","author":[{"given":"Mohammad D.","family":"Mottaghi","sequence":"first","affiliation":[{"name":"University of Tehran, Tehran, Iran"}]},{"given":"Ali Afzali","family":"Kusha","sequence":"additional","affiliation":[{"name":"University of Tehran, Tehran, Iran"}]},{"given":"Zainanabedin","family":"Navabi","sequence":"additional","affiliation":[{"name":"Northeastern University, Boston"}]}],"member":"320","published-online":{"date-parts":[[2006,8,28]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"e_1_3_2_1_2_1","first-page":"12.1.1","volume-title":"IEEE 1994 CICC","author":"Chandrakasan A.","unstructured":"A. Chandrakasan , \"Design of portable systems,\" Proc . IEEE 1994 CICC , pp. 12.1.1 -- 12.1.8 . A. Chandrakasan, \"Design of portable systems,\" Proc. IEEE 1994 CICC, pp. 12.1.1--12.1.8."},{"key":"e_1_3_2_1_3_1","first-page":"93","volume-title":"ISCAS 2002. IEEE International Symposium on Circuits and Systems","volume":"4","author":"Shen Nan-Ying","year":"2002","unstructured":"Nan-Ying Shen , Chen. O.T. , \"Low-power multipliers by minimizing switching activities of partial products \", ISCAS 2002. IEEE International Symposium on Circuits and Systems , vol. 4 , pp. 93 -- 96 , May 2002 . Nan-Ying Shen, Chen.O.T., \"Low-power multipliers by minimizing switching activities of partial products\", ISCAS 2002. IEEE International Symposium on Circuits and Systems, vol.4, pp. 93--96, May 2002."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.810788"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.311649"},{"key":"e_1_3_2_1_6_1","volume-title":"Computer Arithmetic Algorithms and Hardware Designs","author":"Parhami B.","year":"2000","unstructured":"B. Parhami , Computer Arithmetic Algorithms and Hardware Designs . Oxford university press , 1 st edition, 2000 . B. Parhami, Computer Arithmetic Algorithms and Hardware Designs. Oxford university press, 1st edition, 2000.","edition":"1"},{"key":"e_1_3_2_1_7_1","first-page":"1155","volume-title":"Proc. International Conference on Solid-State and Integrated Circuit Technology","author":"Junming L.","year":"2001","unstructured":"L. Junming , \" A novel 10-transistor lowpower high-speed full adder cell \", Proc. International Conference on Solid-State and Integrated Circuit Technology , 2001 , pp. 1155 -- 1158 . L. Junming, \"A novel 10-transistor lowpower high-speed full adder cell\", Proc. International Conference on Solid-State and Integrated Circuit Technology, 2001, pp. 1155--1158."},{"key":"e_1_3_2_1_8_1","unstructured":"M. D. Mottaghi \"Low-power ring counter based of hot-block architecture \" to be published  M. D. Mottaghi \"Low-power ring counter based of hot-block architecture \" to be published"},{"key":"e_1_3_2_1_9_1","first-page":"586","volume-title":"5th International Conference on ASIC","volume":"2","author":"Heo S.-W.","year":"2003","unstructured":"S.-W. Heo , M.-G. Kim , and Y.-S. Lee , \"Study of optimized adder selection,\" Proc . 5th International Conference on ASIC , vol. 2 , pp. 586 -- 590 , Oct. 2003 . S.-W. Heo, M.-G. Kim, and Y.-S. Lee, \"Study of optimized adder selection,\" Proc. 5th International Conference on ASIC, vol. 2, pp. 586--590, Oct. 2003."},{"key":"e_1_3_2_1_10_1","first-page":"201","volume-title":"5th International Conference on ASIC","volume":"2","author":"Sayed A.","year":"2002","unstructured":"A. Sayed and H. Al-Asaad , \" Survey and evaluation of low-power full-adder cells,\" Proc . 5th International Conference on ASIC , vol. 2 , pp. 201 -- 206 , Oct. 2002 . A. Sayed and H. Al-Asaad, \"Survey and evaluation of low-power full-adder cells,\" Proc. 5th International Conference on ASIC, vol. 2, pp. 201--206, Oct. 2002."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/82.842117"},{"key":"e_1_3_2_1_12_1","first-page":"43","volume-title":"International Symposium on Circuits and Systems","author":"Mahmoud H. A.","year":"1999","unstructured":"H. A. Mahmoud and M. Bayoumi , \" A 10-transistor low-power high-speed full adder cell,\" Proc . International Symposium on Circuits and Systems , 1999 , pp. 43 -- 46 . H. A. Mahmoud and M. Bayoumi, \"A 10-transistor low-power high-speed full adder cell,\" Proc. International Symposium on Circuits and Systems, 1999, pp. 43--46."}],"event":{"name":"SBCCI06: 19th Symposium on Integrated Circuits and System Design","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"Ouro Preto MG Brazil","acronym":"SBCCI06"},"container-title":["Proceedings of the 19th annual symposium on Integrated circuits and systems design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1150343.1150390","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,8]],"date-time":"2023-01-08T01:49:23Z","timestamp":1673142563000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1150343.1150390"}},"subtitle":["a low switching activity architecture for shift-and-add multipliers"],"short-title":[],"issued":{"date-parts":[[2006,8,28]]},"references-count":12,"alternative-id":["10.1145\/1150343.1150390","10.1145\/1150343"],"URL":"https:\/\/doi.org\/10.1145\/1150343.1150390","relation":{},"subject":[],"published":{"date-parts":[[2006,8,28]]},"assertion":[{"value":"2006-08-28","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}