{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:09:23Z","timestamp":1763467763946,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":21,"publisher":"ACM","license":[{"start":{"date-parts":[[2006,9,16]],"date-time":"2006-09-16T00:00:00Z","timestamp":1158364800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,9,16]]},"DOI":"10.1145\/1152154.1152161","type":"proceedings-article","created":{"date-parts":[[2006,10,18]],"date-time":"2006-10-18T22:04:00Z","timestamp":1161209040000},"page":"13-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":136,"title":["Communist, utilitarian, and capitalist cache policies on CMPs"],"prefix":"10.1145","author":[{"given":"Lisa R.","family":"Hsu","sequence":"first","affiliation":[{"name":"University of Michigan, Ann Arbor, Michigan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Steven K.","family":"Reinhardt","sequence":"additional","affiliation":[{"name":"University of Michigan, Ann Arbor, Michigan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ravishankar","family":"Iyer","sequence":"additional","affiliation":[{"name":"Intel Corp, Hillsboro, Oregon"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Srihari","family":"Makineni","sequence":"additional","affiliation":[{"name":"Intel Corp, Hillsboro, Oregon"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2006,9,16]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.27"},{"key":"e_1_3_2_1_2_1","volume-title":"Proceedings of Design Automation Conference","author":"Chiou D.","year":"2000","unstructured":"D. Chiou , P. Jain , S. Devadas , and L. Rudolph . Dynamic cache partitioning via columnization . In Proceedings of Design Automation Conference , Los Angeles , June 2000 . D. Chiou, P. Jain, S. Devadas, and L. Rudolph. Dynamic cache partitioning via columnization. In Proceedings of Design Automation Conference, Los Angeles, June 2000."},{"key":"e_1_3_2_1_3_1","first-page":"395","volume-title":"Proc. 2005 USENIX Technical Conference","author":"Fedorova A.","year":"2005","unstructured":"A. Fedorova , M. Seltzer , C. Small , and D. Nussbaum . Performance of multithreaded chip multiprocessors and implications for operating system design . In Proc. 2005 USENIX Technical Conference , pages 395 -- 398 , 2005 . A. Fedorova, M. Seltzer, C. Small, and D. Nussbaum. Performance of multithreaded chip multiprocessors and implications for operating system design. In Proc. 2005 USENIX Technical Conference, pages 395--398, 2005."},{"key":"e_1_3_2_1_4_1","volume-title":"Nov.","author":"Goodwins R.","year":"2005","unstructured":"R. Goodwins . Does hyperthreading hurt server performance? http:\/\/news.com.com\/Does+hyperthreading+hurt+server+performance\/2100-1006_3-5965435.html?tag=nefd.top , Nov. 2005 . R. Goodwins. Does hyperthreading hurt server performance? http:\/\/news.com.com\/Does+hyperthreading+hurt+server+performance\/2100-1006_3-5965435.html?tag=nefd.top, Nov. 2005."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088154"},{"key":"e_1_3_2_1_6_1","unstructured":"Intel Corp. Next leap in microprocessor architecture: Intel core duo. White paper. http:\/\/ces2006.akamai.com.edgesuite.net\/yonahassets\/CoreDuo_WhitePaper.pdf.  Intel Corp. Next leap in microprocessor architecture: Intel core duo. White paper. http:\/\/ces2006.akamai.com.edgesuite.net\/yonahassets\/CoreDuo_WhitePaper.pdf."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOT.2003.1240655"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1006209.1006246"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.1289290"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/1025127.1026001"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.35"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.446.0851"},{"key":"e_1_3_2_1_13_1","unstructured":"M5 Development Team. The M5 Simulator. http:\/\/m5.eecs.umich.edu.  M5 Development Team. The M5 Simulator. http:\/\/m5.eecs.umich.edu."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379244"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.165388"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/377792.377797"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.5555\/874076.876484"},{"key":"e_1_3_2_1_18_1","volume-title":"Proc. 13th IASTED Int'l Conference on Parallel and Distributed Computing Systems","author":"Suh G. E.","year":"2001","unstructured":"G. E. Suh , L. Rudolph , and S. Devadas . Dynamic cache partitioning for simultaneous multithreading systems . In Proc. 13th IASTED Int'l Conference on Parallel and Distributed Computing Systems , 2001 . G. E. Suh, L. Rudolph, and S. Devadas. Dynamic cache partitioning for simultaneous multithreading systems. In Proc. 13th IASTED Int'l Conference on Parallel and Distributed Computing Systems, 2001."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.144619"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.5555\/1060289.1060307"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/107971.107981"}],"event":{"name":"PACT06: 2006 International Conference on Parallel Architectures and Compilation Techniques","sponsor":["ACM Association for Computing Machinery"],"location":"Seattle Washington USA","acronym":"PACT06"},"container-title":["Proceedings of the 15th international conference on Parallel architectures and compilation techniques"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1152154.1152161","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1152154.1152161","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T16:07:43Z","timestamp":1750262863000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1152154.1152161"}},"subtitle":["caches as a shared resource"],"short-title":[],"issued":{"date-parts":[[2006,9,16]]},"references-count":21,"alternative-id":["10.1145\/1152154.1152161","10.1145\/1152154"],"URL":"https:\/\/doi.org\/10.1145\/1152154.1152161","relation":{},"subject":[],"published":{"date-parts":[[2006,9,16]]},"assertion":[{"value":"2006-09-16","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}