{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T09:29:54Z","timestamp":1725614994643},"publisher-location":"New York, NY, USA","reference-count":44,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2006,12,3]]},"DOI":"10.1145\/1185347.1185362","type":"proceedings-article","created":{"date-parts":[[2007,1,17]],"date-time":"2007-01-17T01:15:56Z","timestamp":1168996556000},"page":"103-112","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["An effective network processor design framework"],"prefix":"10.1145","author":[{"given":"Liam","family":"Noonan","sequence":"first","affiliation":[{"name":"University Of Limerick, Limerick, Ireland"}]},{"given":"Colin","family":"Flanagan","sequence":"additional","affiliation":[{"name":"University Of Limerick, Limerick, Ireland"}]}],"member":"320","published-online":{"date-parts":[[2006,12,3]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"S. Adcock. Genetic algorithm utility library (gaul) http:\/\/gaul.sourceforge.net\/ 2006.  S. Adcock. Genetic algorithm utility library (gaul) http:\/\/gaul.sourceforge.net\/ 2006."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/967900.968080"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1016\/S1389-1286(00)00205-X"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1086\/276408"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/584369.584410"},{"key":"e_1_3_2_1_6_1","volume-title":"Department of Computer Science","author":"Charitakis I.","year":"2003","unstructured":"I. Charitakis . Using the IXP 1200 network processor in network intrusion detection systems. Master's thesis , Department of Computer Science , University of Crete , 2003 . I. Charitakis. Using the IXP 1200 network processor in network intrusion detection systems. Master's thesis, Department of Computer Science, University of Crete, 2003."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/335231.335237"},{"key":"e_1_3_2_1_8_1","volume-title":"Handbook of Genetic Algorithms","author":"Davis L.","year":"1991","unstructured":"L. Davis . Handbook of Genetic Algorithms . Van Nostrand Reinhold , 1991 . L. Davis. Handbook of Genetic Algorithms. Van Nostrand Reinhold, 1991."},{"key":"e_1_3_2_1_9_1","volume-title":"Multi-objective optimization using evolutionary algorithms","author":"Deb K.","year":"2004","unstructured":"K. Deb . Multi-objective optimization using evolutionary algorithms . John Wiley and Sons Ltd , 2004 . K. Deb. Multi-objective optimization using evolutionary algorithms. John Wiley and Sons Ltd, 2004."},{"key":"e_1_3_2_1_10_1","volume-title":"Jones and Bartlett","author":"Flynn M.","year":"1995","unstructured":"M. Flynn . Computer Architecture - pipelined and parallel processor design . Jones and Bartlett , 1995 . M. Flynn. Computer Architecture - pipelined and parallel processor design. Jones and Bartlett, 1995."},{"key":"e_1_3_2_1_11_1","first-page":"10","volume-title":"Proc. 1st Workshop on Network Processors(NP1) at the 9th Int'l Symposium on High Performance Computer Architecture (HPCA8), Anaheim CA","author":"Franklin M.","year":"2002","unstructured":"M. Franklin and T. Wolf . A network processor performance and design model with benchmark parameterization . In Proc. 1st Workshop on Network Processors(NP1) at the 9th Int'l Symposium on High Performance Computer Architecture (HPCA8), Anaheim CA , pages 10 -- 22 , 2002 . M. Franklin and T. Wolf. A network processor performance and design model with benchmark parameterization. In Proc. 1st Workshop on Network Processors(NP1) at the 9th Int'l Symposium on High Performance Computer Architecture (HPCA8), Anaheim CA, pages 10--22, 2002."},{"key":"e_1_3_2_1_12_1","first-page":"10","volume-title":"Proc. 2nd Workshop on Network Processors (NP2) at the 9th Int'l Symposium on High Performance Computer Architecture (HPCA9), Anaheim CA","author":"Franklin M.","year":"2003","unstructured":"M. Franklin and T. Wolf . Power considerations in network processor design ,. In Proc. 2nd Workshop on Network Processors (NP2) at the 9th Int'l Symposium on High Performance Computer Architecture (HPCA9), Anaheim CA , pages 10 -- 22 , 2003 . M. Franklin and T. Wolf. Power considerations in network processor design,. In Proc. 2nd Workshop on Network Processors (NP2) at the 9th Int'l Symposium on High Performance Computer Architecture (HPCA9), Anaheim CA, pages 10--22, 2003."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0096-0551(01)00014-5"},{"key":"e_1_3_2_1_14_1","volume-title":"Modern Heuristic Techniques for Combinatorial Problems","author":"Glover F.","year":"1993","unstructured":"F. Glover and M. Laguna . Tabu search . In C. Reeves, editor, Modern Heuristic Techniques for Combinatorial Problems , Oxford, England , 1993 . Blackwell Scientific Publishing . F. Glover and M. Laguna. Tabu search. In C. Reeves, editor, Modern Heuristic Techniques for Combinatorial Problems, Oxford, England, 1993. Blackwell Scientific Publishing."},{"key":"e_1_3_2_1_15_1","volume-title":"Genetic Algorithms in Search, Optimization and Machine Learning","author":"GoldBerg D.E.","year":"1989","unstructured":"D.E. GoldBerg . Genetic Algorithms in Search, Optimization and Machine Learning . Addison-Wesley , 1989 . D.E. GoldBerg. Genetic Algorithms in Search, Optimization and Machine Learning. Addison-Wesley, 1989."},{"key":"e_1_3_2_1_16_1","volume-title":"Unified modeling language specification, version 1.3. Technical report","author":"Object Management Group","year":"1999","unstructured":"Object Management Group . Unified modeling language specification, version 1.3. Technical report , Object Management Group , 1999 . Object Management Group. Unified modeling language specification, version 1.3. Technical report, Object Management Group, 1999."},{"key":"e_1_3_2_1_17_1","volume-title":"September","author":"Halfhill T. R.","year":"1999","unstructured":"T. R. Halfhill . Intel network processor targets routers. Microprocessor Report, 13 number 12:1--6 , September 1999 . T. R. Halfhill. Intel network processor targets routers. Microprocessor Report, 13 number 12:1--6, September 1999."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0141-9331(01)00119-3"},{"key":"e_1_3_2_1_19_1","volume-title":"Computer Architecture - A Quantitative Approach. Morgan Kaufmann","author":"Hennessy J. L.","year":"2003","unstructured":"J. L. Hennessy and D. A. Patterson . Computer Architecture - A Quantitative Approach. Morgan Kaufmann , 3 rd edition, 2003 . J. L. Hennessy and D. A. Patterson. Computer Architecture - A Quantitative Approach. Morgan Kaufmann, 3rd edition, 2003.","edition":"3"},{"key":"e_1_3_2_1_20_1","volume-title":"Adaptation in natural and artificial systems","author":"Holland J. H.","year":"1975","unstructured":"J. H. Holland . Adaptation in natural and artificial systems . Univ of Michigan Press , 1975 . J. H. Holland. Adaptation in natural and artificial systems. Univ of Michigan Press, 1975."},{"key":"e_1_3_2_1_21_1","volume-title":"Intel IXA Education Summit","author":"Hou T.C.","year":"2004","unstructured":"T.C. Hou and W. C Lai . Implementation of network processor based Diffserv\/MPLS edge router. Technical report , Intel IXA Education Summit , 2004 . T.C. Hou and W.C Lai. Implementation of network processor based Diffserv\/MPLS edge router. Technical report, Intel IXA Education Summit, 2004."},{"volume-title":"IXP12OO Network Processor Datasheet","year":"2000","key":"e_1_3_2_1_22_1","unstructured":"Intel. IXP12OO Network Processor Datasheet . Intel Corporation ., September 2000 . Intel. IXP12OO Network Processor Datasheet. Intel Corporation., September 2000."},{"volume-title":"Intel IXP 1200 developer workbench ver 2.01.112","year":"2001","key":"e_1_3_2_1_23_1","unstructured":"Intel. Intel IXP 1200 developer workbench ver 2.01.112 , 2001 . Intel. Intel IXP 1200 developer workbench ver 2.01.112, 2001."},{"key":"e_1_3_2_1_24_1","volume-title":"ITU-T","author":"U-T.","year":"1999","unstructured":"IT U-T. Recommendation z. 100, specification and description language (SDL}. Technical report , ITU-T , 1999 . ITU-T. Recommendation z.100, specification and description language (SDL}. Technical report, ITU-T, 1999."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/INFCOM.2002.1019299"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1126\/science.220.4598.671"},{"key":"e_1_3_2_1_27_1","volume-title":"Translated and published as \"Zoological Philosophy: An Exposition with Regard to the Natural History of Animals","author":"Lamarck J.B.","year":"1815","unstructured":"J.B. Lamarck . \"Histoire Naturelle des Animaux Sans Vertbres\", (in French). Translated and published as \"Zoological Philosophy: An Exposition with Regard to the Natural History of Animals \". University of Chicago Press , 1815 ,. J.B. Lamarck. \"Histoire Naturelle des Animaux Sans Vertbres\", (in French). Translated and published as \"Zoological Philosophy: An Exposition with Regard to the Natural History of Animals\". University of Chicago Press, 1815,."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.52"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/371636.371660"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.5555\/603095.603103"},{"key":"e_1_3_2_1_31_1","volume-title":"Communication and concurrency","author":"Milner R.","year":"1989","unstructured":"R. Milner . Communication and concurrency . Prentice-Hall, Inc. , Upper Saddle River, NJ, USA, 1989 . R. Milner. Communication and concurrency. Prentice-Hall, Inc., Upper Saddle River, NJ, USA, 1989."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.5555\/522098"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774804"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/500001.500018"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.5555\/367072.367302"},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2003.1249056"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.5555\/523974.834871"},{"key":"e_1_3_2_1_38_1","volume-title":"Real-Time Object Oriented Modeling","author":"Selic B.","year":"1994","unstructured":"B. Selic , G. Gullekson , and P. Ward . Real-Time Object Oriented Modeling . Wiley , New York ., 1994 . B. Selic, G. Gullekson, and P. Ward. Real-Time Object Oriented Modeling. Wiley, New York., 1994."},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1016\/S1389-1286(02)00455-3"},{"key":"e_1_3_2_1_40_1","volume-title":"Proc. Network Processor Workshop in conjunction with Eighth Int'l Symposium on High Performance Computer Architecture (HPCA-8)","author":"Thiele L.","year":"2002","unstructured":"L. Thiele , S. Chakraborty , M. Gries , and S. Kunzli . Design space exploration of network processor architecture . In Proc. Network Processor Workshop in conjunction with Eighth Int'l Symposium on High Performance Computer Architecture (HPCA-8) , 2002 . L. Thiele, S. Chakraborty, M. Gries, and S. Kunzli. Design space exploration of network processor architecture. In Proc. Network Processor Workshop in conjunction with Eighth Int'l Symposium on High Performance Computer Architecture (HPCA-8), 2002."},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0141-9331(98)00079-9"},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.5555\/554220.838068"},{"key":"e_1_3_2_1_43_1","first-page":"6","volume-title":"Parallel Problem Solving from Nature- PPSN III","author":"Whitley D.","year":"1994","unstructured":"D. Whitley , V. S Gordon , and K. Mathias . Lamarckian evolution, the Baldwin effect and function optimization . In Parallel Problem Solving from Nature- PPSN III , pages 6 -- 15 , 1994 . D. Whitley, V. S Gordon, and K. Mathias. Lamarckian evolution, the Baldwin effect and function optimization. In Parallel Problem Solving from Nature- PPSN III, pages 6--15, 1994."},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.5555\/1153923.1154543"}],"event":{"name":"ANCS06: Symposium on Architecture for Networking and Communications Systems","sponsor":["SIGCOMM ACM Special Interest Group on Data Communication","ACM Association for Computing Machinery","SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"San Jose California USA","acronym":"ANCS06"},"container-title":["Proceedings of the 2006 ACM\/IEEE symposium on Architecture for networking and communications systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1185347.1185362","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,7]],"date-time":"2023-01-07T14:15:34Z","timestamp":1673100934000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1185347.1185362"}},"subtitle":["using multi-objective evolutionary algorithms and object oriented techniques to optimise the intel IXP1200 network processor"],"short-title":[],"issued":{"date-parts":[[2006,12,3]]},"references-count":44,"alternative-id":["10.1145\/1185347.1185362","10.1145\/1185347"],"URL":"https:\/\/doi.org\/10.1145\/1185347.1185362","relation":{},"subject":[],"published":{"date-parts":[[2006,12,3]]},"assertion":[{"value":"2006-12-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}