{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:39:56Z","timestamp":1750307996717,"version":"3.41.0"},"reference-count":27,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2007,2,1]],"date-time":"2007-02-01T00:00:00Z","timestamp":1170288000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Comput. Syst."],"published-print":{"date-parts":[[2007,2]]},"abstract":"<jats:p>A simple mechanism to increase the utilization of a small trace cache, and simultaneously reduce its power consumption, is presented in this article. The mechanism uses selective storage of traces (filtering) that is based on a new concept in computer architecture: random sampling. The sampling filter exploits the \u201chot\/cold trace\u201d principle, which divides the population of traces into two groups. The first group contains \u201chot traces\u201d that are executed many times from the trace cache and contribute the majority of committed instructions. The second group contains \u201ccold traces\u201d that are rarely executed, but are responsible for the majority of writes to an unfiltered cache. The sampling filter selects traces without any prior knowledge of their quality. However, as most writes to the cache are of \u201ccold traces\u201d it statistically filters out those traces, reducing cache turnover and eventually leading to higher quality traces residing in the cache. In contrast with previously proposed filters, which perform bookkeeping for all traces in the program, the sampling filter can be implemented with minimal hardware. Results show that the sampling filter can increase the number of hits per build (utilization) by a factor of 38, reduce the miss rate by 20% and improve the performance-power efficiency by 15%. Further improvements can be obtained by extensions to the basic sampling filter: allowing \u201chot traces\u201d to bypass the sampling filter, combining of sampling together with previously proposed filters, and changing the replacement policy in the trace cache. Those techniques combined with the sampling filter can reduce the miss rate of the trace cache by up to 40%. Although the effectiveness of the sampling filter is demonstrated for a trace cache, the sampling principle is applicable to other micro-architectural structures with similar access patterns.<\/jats:p>","DOI":"10.1145\/1189736.1189739","type":"journal-article","created":{"date-parts":[[2007,4,5]],"date-time":"2007-04-05T19:20:08Z","timestamp":1175800808000},"page":"3","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Trace cache sampling filter"],"prefix":"10.1145","volume":"25","author":[{"given":"Michael","family":"Behar","sequence":"first","affiliation":[{"name":"Intel Corporation, Israel"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Avi","family":"Mendelson","sequence":"additional","affiliation":[{"name":"Intel Corporation, Israel"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Avinoam","family":"Kolodny","sequence":"additional","affiliation":[{"name":"Technion -- Israel Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2007,2]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/300979.300996"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.888701"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339657"},{"key":"e_1_2_1_4_1","doi-asserted-by":"crossref","unstructured":"Burger D. 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Path-based next trace prediction . In Proceedings of the 30th Annual ACM\/IEEE International Symposium on Microarchitecture (Research Triangle Park, NC, Dec. 1--3). IEEE Computer Society Press , Los Alamitos, CA, 14--23. Jacobson, Q., Rotenberg, E., and Smith, J. E. 1997. Path-based next trace prediction. In Proceedings of the 30th Annual ACM\/IEEE International Symposium on Microarchitecture (Research Triangle Park, NC, Dec. 1--3). IEEE Computer Society Press, Los Alamitos, CA, 14--23."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/379240.379268"},{"volume-title":"Proceedings of the 4th Workshop on Feedback-Directed and Dynamic Optimization (Dec.).","author":"Kosyakovsky O.","key":"e_1_2_1_9_1","unstructured":"Kosyakovsky , O. , Mendelson , A. , and Kolodny , A . 2001. The use of profile-based trace classification for improving the power and performance of trace cache systems . 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CSE-TR-335-97, Department of Electrical Engineering and Computer Science, University of Michigan (May)."},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.931895"},{"key":"e_1_2_1_13_1","unstructured":"Patterson D. A. and Hennessy J. L. 1994. Large and fast: Exploiting memory hierarchy. In Computer Organization and Design: The Hardware\/Software Interface. Morgan Kaufmann San Francisco CA.  Patterson D. A. and Hennessy J. L. 1994. Large and fast: Exploiting memory hierarchy. In Computer Organization and Design: The Hardware\/Software Interface. Morgan Kaufmann San Francisco CA."},{"key":"e_1_2_1_14_1","unstructured":"Peleg A. and Weiser. U. 1995. Dynamic flow instruction cache memory organized around trace segments independent of virtual address line U.S. Patent 5 381 533 Jan.  Peleg A. and Weiser. U. 1995. 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Filtering techniques to improve trace-cache efficiency . In Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT). (Sept. 8--12) . IEEE Computer Society Press, Los Alamitos, CA, 37--48. Rosner, R., Mendelson, A., and Ronen, R. 2001. Filtering techniques to improve trace-cache efficiency. In Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT). (Sept. 8--12). IEEE Computer Society Press, Los Alamitos, CA, 37--48."},{"volume-title":"Proceedings of the 31st Annual International Symposium on Computer Architecture (M\u00fcnchen, Germany, June 19--23). International Conference on Computer Architecture. IEEE Computer Society Press","author":"Rosner R.","key":"e_1_2_1_21_1","unstructured":"Rosner , R. , Almog , Y. , Moffie , M. , Schwartz , N. , and Mendelson , A . 2004. Power awareness through selective dynamically optimized traces . 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