{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:38:19Z","timestamp":1750307899573,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","license":[{"start":{"date-parts":[[2007,2,18]],"date-time":"2007-02-18T00:00:00Z","timestamp":1171756800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2007,2,18]]},"DOI":"10.1145\/1216919.1216934","type":"proceedings-article","created":{"date-parts":[[2007,4,5]],"date-time":"2007-04-05T19:41:00Z","timestamp":1175802060000},"page":"99-107","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":23,"title":["Synthesis of an application-specific soft multiprocessor system"],"prefix":"10.1145","author":[{"given":"Jason","family":"Cong","sequence":"first","affiliation":[{"name":"University of California, Los Angeles, Los Angeles, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guoling","family":"Han","sequence":"additional","affiliation":[{"name":"University of California, Los Angeles, Los Angeles, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei","family":"Jiang","sequence":"additional","affiliation":[{"name":"University of California, Los Angeles, Los Angeles, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2007,2,18]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/309847.309980"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.5555\/278241.278309"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.728914"},{"key":"e_1_3_2_1_4_1","volume-title":"Task Scheduling in Parallel and Distributed Systems","author":"El-Rewini H.","year":"1994","unstructured":"H. El-Rewini , T. Lewis , and H. Ali . Task Scheduling in Parallel and Distributed Systems . Prentice Hall , 1994 . H. El-Rewini, T. Lewis, and H. Ali. Task Scheduling in Parallel and Distributed Systems. Prentice Hall, 1994."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/309847.309931"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/78.218149"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1084834.1084903"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0022-0000(74)80044-9"},{"key":"e_1_3_2_1_9_1","first-page":"156","volume-title":"Proc. of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97)","author":"I. Karkowski and H. Corp","unstructured":"I. Karkowski and H. Corp oraal . Design of Heterogenous Multi-processor Embedded Systems: Applying Functional Pipelining . In Proc. of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97) , pp. 156 -- 165 , San Francisco, CA, USA. I. Karkowski and H. Corporaal. Design of Heterogenous Multi-processor Embedded Systems: Applying Functional Pipelining. In Proc. of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), pp. 156--165, San Francisco, CA, USA."},{"key":"e_1_3_2_1_10_1","first-page":"18","article-title":"Module Clustering to Minimize Delay","author":"Lawler E. L.","unstructured":"E. L. Lawler , K. N. Levitt , and J. Turner . Module Clustering to Minimize Delay in Digital Networks. IEEE Transactions on Computers , vol. C - 18 , no. 1, pp. 47--57, January 1966. E. L. Lawler, K. N. Levitt, and J. Turner. Module Clustering to Minimize Delay in Digital Networks. IEEE Transactions on Computers, vol. C-18, no. 1, pp. 47--57, January 1966.","journal-title":"Digital Networks. IEEE Transactions on Computers"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1987.13876"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.381846"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1016\/0743-7315(92)90017-H"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/157485.164907"},{"key":"e_1_3_2_1_15_1","first-page":"487","volume-title":"Proc. 15th International Conference on Field Programmable Logic and Applications (FPL-05)","author":"Ravindran K.","year":"2005","unstructured":"K. Ravindran , N. Satish , Y. Jin , and K. Keutzer . An FPGA-Based Soft Multiprocessor System for IPv4 Packet Forwarding . In Proc. 15th International Conference on Field Programmable Logic and Applications (FPL-05) , pp. 487 -- 492 , August , 2005 . K. Ravindran, N. Satish, Y. Jin, and K. Keutzer. An FPGA-Based Soft Multiprocessor System for IPv4 Packet Forwarding. In Proc. 15th International Conference on Field Programmable Logic and Applications (FPL-05), pp. 487--492, August, 2005."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/12276.13313"},{"key":"e_1_3_2_1_17_1","volume-title":"Embedded Multiprocessors: Scheduling and Synchronization","author":"Sriram S.","year":"2000","unstructured":"S. Sriram and S.S. Bhattacharyya , Embedded Multiprocessors: Scheduling and Synchronization , Marcel Dekker, Inc , 2000 . S. Sriram and S.S. Bhattacharyya, Embedded Multiprocessors: Scheduling and Synchronization, Marcel Dekker, Inc, 2000."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/183432.183440"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.585225"},{"key":"e_1_3_2_1_20_1","unstructured":"Altera Corp. http:\/\/www.altera.com  Altera Corp. http:\/\/www.altera.com"},{"key":"e_1_3_2_1_21_1","unstructured":"LPsolve http:\/\/www.cs.sunysb.edu\/~algorith\/implement\/lpsolve\/implement.shtml  LPsolve http:\/\/www.cs.sunysb.edu\/~algorith\/implement\/lpsolve\/implement.shtml"},{"key":"e_1_3_2_1_22_1","unstructured":"Xilinx Inc. http:\/\/www.xilinx.com.  Xilinx Inc. http:\/\/www.xilinx.com."}],"event":{"name":"FPGA07: ACM\/SIGDA International Symposium on Field Programmable Gate Arrays 2007","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA07"},"container-title":["Proceedings of the 2007 ACM\/SIGDA 15th international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1216919.1216934","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1216919.1216934","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T14:47:32Z","timestamp":1750258052000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1216919.1216934"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,2,18]]},"references-count":22,"alternative-id":["10.1145\/1216919.1216934","10.1145\/1216919"],"URL":"https:\/\/doi.org\/10.1145\/1216919.1216934","relation":{},"subject":[],"published":{"date-parts":[[2007,2,18]]},"assertion":[{"value":"2007-02-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}