{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T11:47:54Z","timestamp":1763466474738,"version":"3.41.0"},"reference-count":18,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2007,3,1]],"date-time":"2007-03-01T00:00:00Z","timestamp":1172707200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGARCH Comput. Archit. News"],"published-print":{"date-parts":[[2007,3]]},"abstract":"<jats:p>As more and more cores are enabled on the die of future CMP platforms, we expect that several diverse workloads will run simultaneously on the platform. A key example of this trend is the growth of virtualization usage models. When multiple virtual machines or applications or threads run simultaneously, the quality of service (QoS) that the platform provides to each individual thread is non-deterministic today. This occurs because the simultaneously running threads place very different demands on the shared resources (cache space, memory bandwidth, etc) in the platform and in most cases contend with each other. In this paper, we first present case studies that show how this results in non-deterministic performance. Unlike the compute resources managed through scheduling, platform resource allocation to individual threads cannot be controlled today. In order to provide better determinism and QoS, we then examine resource management mechanisms and present QoS-aware architectures and execution environments. The main contribution of this paper is the architecture feasibility analysis through prototypes that allow experimentation with QoS-Aware execution environments and architectural resources. We describe these QoS prototypes and then present preliminary case studies of multi-tasking and virtualization usage models sharing one critical CMP resource (last-level cache). We then demonstrate how proper management of the cache resource can provide service differentiation and deterministic performance behavior when running disparate workloads in future CMP platforms.<\/jats:p>","DOI":"10.1145\/1241601.1241608","type":"journal-article","created":{"date-parts":[[2007,6,6]],"date-time":"2007-06-06T14:37:16Z","timestamp":1181140636000},"page":"21-30","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":34,"title":["From chaos to QoS"],"prefix":"10.1145","volume":"35","author":[{"given":"Fei","family":"Guo","sequence":"first","affiliation":[{"name":"North Carolina State University, Raleigh, NC"}]},{"given":"Hari","family":"Kannan","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}]},{"given":"Li","family":"Zhao","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}]},{"given":"Ramesh","family":"Illikkal","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}]},{"given":"Ravi","family":"Iyer","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}]},{"given":"Don","family":"Newell","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hillsboro, OR"}]},{"given":"Yan","family":"Solihin","sequence":"additional","affiliation":[{"name":"North Carolina State University, Raleigh, NC"}]},{"given":"Christos","family":"Kozyrakis","sequence":"additional","affiliation":[{"name":"Stanford University, Stanford, CA"}]}],"member":"320","published-online":{"date-parts":[[2007,3]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Azul Compute Appliance \" Azul Systems can be found at http:\/\/www.azulsystems.com\/products\/cpools_cappliance.html  Azul Compute Appliance \" Azul Systems can be found at http:\/\/www.azulsystems.com\/products\/cpools_cappliance.html"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/945445.945462"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.27"},{"volume-title":"Performance Isolation of a Misbehaving Virtual Machine with Xen. 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Fishtein, et. al., \"SoftSDV: A Presilicon Software Development Environment for the IA-64 Architecture\", Intel Technology Journal, Q4, 1999. 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