{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:52:42Z","timestamp":1750308762009,"version":"3.41.0"},"reference-count":112,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2007,8,17]],"date-time":"2007-08-17T00:00:00Z","timestamp":1187308800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000144","name":"Division of Computer and Network Systems","doi-asserted-by":"publisher","award":["CNS-0614957"],"award-info":[{"award-number":["CNS-0614957"]}],"id":[{"id":"10.13039\/100000144","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2005-HJ-1331"],"award-info":[{"award-number":["2005-HJ-1331"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2007,8,17]]},"abstract":"<jats:p>Recent high-level synthesis approaches and C-based hardware description languages attempt to improve the hardware design process by allowing developers to capture desired hardware functionality in a well-known high-level source language. However, these approaches have yet to achieve wide commercial success due in part to the difficulty of incorporating such approaches into software tool flows. The requirement of using a specific language, compiler, or development environment may cause many software developers to resist such approaches due to the difficulty and possible instability of changing well-established robust tool flows. Thus, in the past several years, synthesis from binaries has been introduced, both in research and in commercial tools, as a means of better integrating with tool flows by supporting all high-level languages and software compilers. Binary synthesis can be more easily integrated into a software development tool-flow by only requiring an additional backend tool, and it even enables completely transparent dynamic translation of executing binaries to configurable hardware circuits. In this article, we survey the key technologies underlying the important emerging field of binary synthesis. We compare binary synthesis to several related areas of research, and we then describe the key technologies required for effective binary synthesis: decompilation techniques necessary for binary synthesis to achieve results competitive with source-level synthesis, hardware\/software partitioning methods necessary to find critical binary regions suitable for synthesis, synthesis methods for converting regions to custom circuits, and binary update methods that enable replacement of critical binary regions by circuits.<\/jats:p>","DOI":"10.1145\/1255456.1255471","type":"journal-article","created":{"date-parts":[[2007,9,14]],"date-time":"2007-09-14T13:44:55Z","timestamp":1189777495000},"page":"1-30","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["Binary synthesis"],"prefix":"10.1145","volume":"12","author":[{"given":"Greg","family":"Stitt","sequence":"first","affiliation":[{"name":"University of California, Riverside, CA"}]},{"given":"Frank","family":"Vahid","sequence":"additional","affiliation":[{"name":"University of California, Riverside, CA"}]}],"member":"320","published-online":{"date-parts":[[2008,5,22]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Ahpah Software Inc. 2004. SourceAgain Java decompiler. http:\/\/www.ahpah.com\/product.html.  Ahpah Software Inc. 2004. SourceAgain Java decompiler. http:\/\/www.ahpah.com\/product.html."},{"key":"e_1_2_1_2_1","unstructured":"Altera Corp. 2006. Nios embedded processor. http:\/\/www.altera.com\/products\/ip\/processors\/nios\/nio-index.html.  Altera Corp. 2006. Nios embedded processor. http:\/\/www.altera.com\/products\/ip\/processors\/nios\/nio-index.html."},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/258915.258924"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.204677"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/358438.349303"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/183432.183527"},{"volume-title":"Proceedings of the International Symposium on Microarchitecture (MICRO). 191--201","author":"Baraz L.","key":"e_1_2_1_7_1"},{"key":"e_1_2_1_8_1","unstructured":"Barbe P. 1974. The Piler system of computer program translation. Techn. rep. PLR-020 Probe Consultants Inc. Prepared for the Office of Naval Research distributed by National Technical Information Service USA. ADA000294. Contract N00014-67-C-0472.  Barbe P. 1974. The Piler system of computer program translation. Techn. rep. PLR-020 Probe Consultants Inc. Prepared for the Office of Naval Research distributed by National Technical Information Service USA. ADA000294. Contract N00014-67-C-0472."},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065771"},{"volume-title":"Proceedings of the International Workshop on Field Programmable Logic and Applications (FPLA). 213--222","author":"Betz V.","key":"e_1_2_1_10_1"},{"key":"e_1_2_1_11_1","doi-asserted-by":"crossref","unstructured":"Betz V. Rose J. and Marquardt A. 1999. Architecture and CAD for Deep-Submicron FPGAs. Kluwer Academic Publishers.   Betz V. Rose J. and Marquardt A. 1999. Architecture and CAD for Deep-Submicron FPGAs. Kluwer Academic Publishers.","DOI":"10.1007\/978-1-4615-5145-4"},{"key":"e_1_2_1_12_1","unstructured":"Binachip Inc. 2006. http:\/\/www.binachip.com\/.  Binachip Inc. 2006. http:\/\/www.binachip.com\/."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1013623303037"},{"key":"e_1_2_1_14_1","unstructured":"The Boomerang Decompiler Project. 2006. Boomerang Decompiler. http:\/\/boomerang. sourceforge.net\/.  The Boomerang Decompiler Project. 2006. Boomerang Decompiler. http:\/\/boomerang. sourceforge.net\/."},{"key":"e_1_2_1_15_1","doi-asserted-by":"crossref","unstructured":"Brayton R. K. Hatchtel G. D. McMullen C. T. and Sangiovanni-Vincentelli A. L. 1984. Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers.   Brayton R. K. Hatchtel G. D. McMullen C. T. and Sangiovanni-Vincentelli A. L. 1984. Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers.","DOI":"10.1007\/978-1-4613-2821-6"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/186025.186093"},{"key":"e_1_2_1_17_1","unstructured":"Brinkley D. L. 1981. Intercomputer transportation of assembly language software through decompilation. Techn. rep. Naval Underwater Systems Center.  Brinkley D. L. 1981. Intercomputer transportation of assembly language software through decompilation. Techn. rep. Naval Underwater Systems Center."},{"key":"e_1_2_1_18_1","unstructured":"Celoxica. 2006. DK design suite. http:\/\/www.celoxica.com\/products\/dk\/default.asp.  Celoxica. 2006. DK design suite. http:\/\/www.celoxica.com\/products\/dk\/default.asp."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0164-1212(02)00066-3"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.671403"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.296155"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339694"},{"key":"e_1_2_1_23_1","unstructured":"Cifuentes C. 1994. Reverse compilation techniques. PhD thesis Queensland University of Technology Department of Computer Science.  Cifuentes C. 1994. Reverse compilation techniques. PhD thesis Queensland University of Technology Department of Computer Science."},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.825697"},{"volume-title":"Proceedings of the Workshop on Binary Translation. 12--22","author":"Cifuentes C.","key":"e_1_2_1_25_1"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.5555\/832308.837157"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.9"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.5"},{"key":"e_1_2_1_29_1","unstructured":"CriticalBlue. 2006. http:\/\/www.criticalblue.com.  CriticalBlue. 2006. http:\/\/www.criticalblue.com."},{"key":"e_1_2_1_30_1","unstructured":"Decompilation Wiki. 2006. http:\/\/www.program-transformation.org\/Transform\/DeCompilation.  Decompilation Wiki. 2006. http:\/\/www.program-transformation.org\/Transform\/DeCompilation."},{"volume-title":"Proceedings of the International Symposium on Code Generation and Optimization (CGO). 15--24","author":"Dehnert J. C.","key":"e_1_2_1_31_1"},{"key":"e_1_2_1_32_1","unstructured":"De Micheli G. 1994. Synthesis and Optimization of Digital Circuits. McGraw-Hill.   De Micheli G. 1994. Synthesis and Optimization of Digital Circuits. McGraw-Hill."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2004.06.007"},{"key":"e_1_2_1_34_1","unstructured":"DisC Decompiler. 2006. http:\/\/www.debugmode.com\/dcompile\/disc.htm.  DisC Decompiler. 2006. http:\/\/www.debugmode.com\/dcompile\/disc.htm."},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/356989.357008"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.931892"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008857008151"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.5555\/647927.739391"},{"volume-title":"Proceedings of the International Workshop on Hardware\/Software Codesign (CODES).","author":"Ernst R.","key":"e_1_2_1_39_1"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/371636.371657"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/309847.309923"},{"key":"e_1_2_1_42_1","first-page":"31","article-title":"Hardware compilation for software engineers: An ATM example","volume":"148","author":"Fleury M.","year":"2001","journal-title":"Softw. Engin."},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/390014.808281"},{"volume-title":"Proceedings of the International Symposium on Microarchitecture (MICRO). 173--181","author":"Friendly D. H.","key":"e_1_2_1_44_1"},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/360276.360326"},{"key":"e_1_2_1_46_1","first-page":"33","article-title":"C function recognition technique and its implementation in 8086 C decompiling system","volume":"12","author":"Fuan C.","year":"1991","journal-title":"Mini-Micro Syst."},{"key":"e_1_2_1_47_1","doi-asserted-by":"crossref","unstructured":"Gajski D. Dutt N. Wu A. Lin S. 1992. High-Level Synthesis---Introduction to Chip and System Design. Kluwer Academic Publishers.   Gajski D. Dutt N. Wu A. Lin S. 1992. High-Level Synthesis---Introduction to Chip and System Design. Kluwer Academic Publishers.","DOI":"10.1007\/978-1-4615-3636-9"},{"key":"e_1_2_1_48_1","unstructured":"Gajski D. Vahid F. Narayan S. and Gong J. 1994. Specification and Design of Embedded Systems. Prentice Hall.   Gajski D. Vahid F. Narayan S. and Gong J. 1994. Specification and Design of Embedded Systems. Prentice Hall."},{"volume-title":"Proceedings of Symposium on FPGAs for Custom Computing Machines (FCCM). 126--135","author":"Gokhale M. B.","key":"e_1_2_1_49_1"},{"key":"e_1_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.848473"},{"key":"e_1_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951728"},{"key":"e_1_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.825696"},{"key":"e_1_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1145\/997163.997199"},{"key":"e_1_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.232470"},{"volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe (DATE). 2--7.","author":"Gupta R. K.","key":"e_1_2_1_55_1"},{"volume-title":"Proceedings of International Conference on VLSI Design (VLSI).","author":"Gupta S.","key":"e_1_2_1_56_1"},{"key":"e_1_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1145\/1465611.1465689"},{"key":"e_1_2_1_58_1","unstructured":"Halstead M. H. 1970. Using the computer for program conversion. Datamation 125--129.  Halstead M. H. 1970. Using the computer for program conversion. Datamation 125--129."},{"volume-title":"Proceedings of the International Conference on Computer-aided Design (ICCAD). 690--697","author":"Helaihel R.","key":"e_1_2_1_59_1"},{"key":"e_1_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1145\/165496.165500"},{"key":"e_1_2_1_61_1","unstructured":"Hollander C. R. 1973. Decompilation of object programs. PhD dissertation Computer Science Stanford University.   Hollander C. R. 1973. Decompilation of object programs. PhD dissertation Computer Science Stanford University."},{"key":"e_1_2_1_62_1","unstructured":"Hood S. T. 1991. Decompiling with definite clause grammars. Tech. rep. ERL-0571-RR Electronics Research Laboratory DSTO Australia.  Hood S. T. 1991. Decompiling with definite clause grammars. Tech. rep. ERL-0571-RR Electronics Research Laboratory DSTO Australia."},{"key":"e_1_2_1_63_1","unstructured":"Hopwood G. L. 1978. Decompilation. PhD dissertation Computer Science University of California Irvine.   Hopwood G. L. 1978. Decompilation. PhD dissertation Computer Science University of California Irvine."},{"key":"e_1_2_1_64_1","doi-asserted-by":"publisher","DOI":"10.1145\/800182.810410"},{"key":"e_1_2_1_65_1","doi-asserted-by":"publisher","DOI":"10.1145\/1046192.1046207"},{"key":"e_1_2_1_66_1","unstructured":"JReversePro. 2006. http:\/\/jrevpro.sourceforge.net\/.  JReversePro. 2006. http:\/\/jrevpro.sourceforge.net\/."},{"key":"e_1_2_1_67_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.513937"},{"key":"e_1_2_1_68_1","unstructured":"Ku D. and De Micheli G. 1990. HardwareC---a language for hardware design (version 2.0). Tech. rep. CSL-TR-90-419 Stanford University.   Ku D. and De Micheli G. 1990. HardwareC---a language for hardware design (version 2.0). Tech. rep. CSL-TR-90-419 Stanford University."},{"key":"e_1_2_1_69_1","doi-asserted-by":"publisher","DOI":"10.1145\/301177.301190"},{"key":"e_1_2_1_70_1","doi-asserted-by":"publisher","DOI":"10.1145\/309847.310059"},{"volume-title":"Proceedings of Symposium on Field-Programmable Custom Computing Machines (FCCM). 239","author":"Kulkarni D.","key":"e_1_2_1_71_1"},{"key":"e_1_2_1_72_1","doi-asserted-by":"publisher","DOI":"10.1145\/207110.207163"},{"key":"e_1_2_1_73_1","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337559"},{"key":"e_1_2_1_74_1","doi-asserted-by":"publisher","DOI":"10.1145\/1142980.1142986"},{"key":"e_1_2_1_75_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775918"},{"key":"e_1_2_1_76_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996819"},{"key":"e_1_2_1_77_1","unstructured":"Mentor Graphics Corp. 2006. Catapult C synthesis. http:\/\/www.mentor.com\/products\/c-based_design\/catapult_c_synthesis\/index.cfm.  Mentor Graphics Corp. 2006. Catapult C synthesis. http:\/\/www.mentor.com\/products\/c-based_design\/catapult_c_synthesis\/index.cfm."},{"key":"e_1_2_1_78_1","unstructured":"MIPS Computer Systems. 1990. UMIPS-V reference manual (pixie and pixstats).  MIPS Computer Systems. 1990. UMIPS-V reference manual (pixie and pixstats)."},{"key":"e_1_2_1_79_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996678"},{"key":"e_1_2_1_80_1","unstructured":"Mocha the Java Decompiler. 1996. http:\/\/www.brouhaha.com\/~eric\/software\/mocha\/  Mocha the Java Decompiler. 1996. http:\/\/www.brouhaha.com\/~eric\/software\/mocha\/"},{"key":"e_1_2_1_81_1","doi-asserted-by":"publisher","DOI":"10.5555\/832308.837156"},{"volume-title":"Proceedings of the European Conference on Programming (ESOP). 208--223","year":"1999","author":"Mycroft A.","key":"e_1_2_1_82_1"},{"key":"e_1_2_1_83_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2003.1220583"},{"key":"e_1_2_1_84_1","unstructured":"OXFORD Hardware Compilation Group. 1997. The Handel language. Tech. rep. Oxford University.  OXFORD Hardware Compilation Group. 1997. The Handel language. Tech. rep. Oxford University."},{"key":"e_1_2_1_85_1","unstructured":"REC (Reverse Engineering Compiler). 2005. http:\/\/www.backerstreet.com\/rec\/rec.htm.  REC (Reverse Engineering Compiler). 2005. http:\/\/www.backerstreet.com\/rec\/rec.htm."},{"volume-title":"Proceedings of the USENIX Windows NT Workshop. 1--7.","author":"Romer T.","key":"e_1_2_1_86_1"},{"key":"e_1_2_1_87_1","doi-asserted-by":"publisher","DOI":"10.1145\/1464182.1464211"},{"key":"e_1_2_1_88_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF01933120"},{"volume-title":"Proceedings of the International Conference on Computer Design (ICCD). 94","author":"Scott J.","key":"e_1_2_1_89_1"},{"key":"e_1_2_1_90_1","doi-asserted-by":"publisher","DOI":"10.1145\/151220.151227"},{"volume-title":"Proceedings of the Conference on Design, Automation, and Test in Europe (DATE). 28--35","author":"Srinivasan V.","key":"e_1_2_1_91_1"},{"key":"e_1_2_1_92_1","doi-asserted-by":"publisher","DOI":"10.1145\/1046192.1046208"},{"key":"e_1_2_1_93_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775896"},{"key":"e_1_2_1_94_1","doi-asserted-by":"crossref","unstructured":"Stitt G. and Vahid F. 2003. Binary-level hardware\/software partitioning of MediaBench NetBench and EEMBC benchmarks. Tech. rep. UCR-CSE-03-01 Department of Computer Science and Engineering University of California Riverside.  Stitt G. and Vahid F. 2003. Binary-level hardware\/software partitioning of MediaBench NetBench and EEMBC benchmarks. Tech. rep. UCR-CSE-03-01 Department of Computer Science and Engineering University of California Riverside.","DOI":"10.1145\/775832.775896"},{"key":"e_1_2_1_95_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.9"},{"key":"e_1_2_1_96_1","doi-asserted-by":"publisher","DOI":"10.1145\/774572.774596"},{"volume-title":"Proceedings of the International Conference on Computer Aided Design (ICCAD). 547--554","author":"Stitt G.","key":"e_1_2_1_97_1"},{"key":"e_1_2_1_98_1","doi-asserted-by":"publisher","DOI":"10.1145\/1084834.1084905"},{"key":"e_1_2_1_99_1","unstructured":"Stretch Inc. 2006. http:\/\/www.stretchinc.com.  Stretch Inc. 2006. http:\/\/www.stretchinc.com."},{"key":"e_1_2_1_100_1","unstructured":"Synopsys. 2006. Design compiler. http:\/\/www.synopsys.com\/products\/logic\/design_compiler.html.  Synopsys. 2006. Design compiler. http:\/\/www.synopsys.com\/products\/logic\/design_compiler.html."},{"key":"e_1_2_1_101_1","unstructured":"Synplicity Inc. 2006. Synplify ASIC. http:\/\/www.synplicity.com\/corporate\/pressreleases\/2003\/SYB-197final.html  Synplicity Inc. 2006. Synplify ASIC. http:\/\/www.synplicity.com\/corporate\/pressreleases\/2003\/SYB-197final.html"},{"key":"e_1_2_1_102_1","unstructured":"Tensilica Inc. 2006. XPRES Compiler. http:\/\/www.tensilica.com\/html\/xpres.html.  Tensilica Inc. 2006. XPRES Compiler. http:\/\/www.tensilica.com\/html\/xpres.html."},{"key":"e_1_2_1_103_1","unstructured":"Transmeta Corp. 2006. Transmeta Efficeon. http:\/\/www.transmeta.com\/efficeon\/.  Transmeta Corp. 2006. Transmeta Efficeon. http:\/\/www.transmeta.com\/efficeon\/."},{"key":"e_1_2_1_104_1","doi-asserted-by":"publisher","DOI":"10.5555\/792768.793517"},{"volume-title":"Proceedings of the Design Automation Conference (DAC). 219--224","author":"Vahid F.","key":"e_1_2_1_105_1"},{"key":"e_1_2_1_106_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2005.3"},{"key":"e_1_2_1_107_1","doi-asserted-by":"crossref","unstructured":"Walker R. and Camposano R. 1991. A Survey of High-Level Synthesis Systems. Kluwer Academic Publishers.  Walker R. and Camposano R. 1991. A Survey of High-Level Synthesis Systems. Kluwer Academic Publishers.","DOI":"10.1007\/978-1-4615-3968-1"},{"key":"e_1_2_1_108_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.293155"},{"key":"e_1_2_1_109_1","doi-asserted-by":"crossref","unstructured":"Workman D. A. 1978. Language design using decompilation. Tech. rep. University of Central Florida.  Workman D. A. 1978. Language design using decompilation. Tech. rep. University of Central Florida.","DOI":"10.21236\/ADA069177"},{"key":"e_1_2_1_110_1","unstructured":"Xilinx Inc. 2006. Xilinx MicroBlaze. http:\/\/www.xilinx.com\/xlnx\/xebiz\/designResources\/ip_ product _details.jsp?key=micro_blaze.  Xilinx Inc. 2006. Xilinx MicroBlaze. http:\/\/www.xilinx.com\/xlnx\/xebiz\/designResources\/ip_ product _details.jsp?key=micro_blaze."},{"key":"e_1_2_1_111_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.805748"},{"volume-title":"Proceedings of the Symposium on Field-Programmable Custom Computing Machines (FCCM). 37--46","author":"Zaretsky D.","key":"e_1_2_1_112_1"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1255456.1255471","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1255456.1255471","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T20:22:28Z","timestamp":1750278148000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1255456.1255471"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,8,17]]},"references-count":112,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2007,8,17]]}},"alternative-id":["10.1145\/1255456.1255471"],"URL":"https:\/\/doi.org\/10.1145\/1255456.1255471","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"type":"print","value":"1084-4309"},{"type":"electronic","value":"1557-7309"}],"subject":[],"published":{"date-parts":[[2007,8,17]]},"assertion":[{"value":"2006-02-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2006-10-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-05-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}