{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:39:37Z","timestamp":1750307977337,"version":"3.41.0"},"publisher-location":"New York, New York, USA","reference-count":9,"publisher":"ACM Press","license":[{"start":{"date-parts":[[1995,1,1]],"date-time":"1995-01-01T00:00:00Z","timestamp":788918400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1995]]},"DOI":"10.1145\/1275165.1275170","type":"proceedings-article","created":{"date-parts":[[2016,3,25]],"date-time":"2016-03-25T12:48:51Z","timestamp":1458910131000},"page":"5-es","source":"Crossref","is-referenced-by-count":0,"title":["An enhanced DLX-based superscalar system simulator"],"prefix":"10.1145","author":[{"given":"Chung-Ho","family":"Chen","sequence":"first","affiliation":[{"name":"National Yunlin Institute of Technology, Touliu, R.O.C. on Taiwan"}]},{"given":"Akida","family":"Wu","sequence":"additional","affiliation":[{"name":"National Yunlin Institute of Technology, Touliu, R.O.C. on Taiwan"}]}],"member":"320","reference":[{"key":"key-10.1145\/1275165.1275170-1","unstructured":"C. Moura, \"SuperDLX A Generic SuperScalar Simulator,\" ACAPS Technical Memo 64, School of Computer Science, McGill University, may 1993."},{"key":"key-10.1145\/1275165.1275170-2","doi-asserted-by":"crossref","unstructured":"C. Young, N. Gloy, and M. D. Smith, \"A Comparative Analysis of Schemes for Correlated Branch Prediction,\" the 22nd International Symposium on Computer Architecture, June 1995. pp. 276--286.","DOI":"10.1145\/223982.224438"},{"key":"key-10.1145\/1275165.1275170-3","doi-asserted-by":"crossref","unstructured":"T. A. Diep, C. Nelson, J. P. Shen, \"Performance Evaluation of the PowerPC 620 Microarchitecture,\" the 22nd International Symposium on Computer Architecture, June 1995. pp. 163--174.","DOI":"10.1145\/223982.224417"},{"key":"key-10.1145\/1275165.1275170-4","doi-asserted-by":"crossref","unstructured":"M. Tremblay, D. Greenley, and K. Normoyle, \"The Design of the Microarchitecture of UltraSPARC-1,\" Proceedings of the IEEE, VOL. 83, NO. 12, December 1995, pp. 1653--1663.","DOI":"10.1109\/5.476081"},{"key":"key-10.1145\/1275165.1275170-5","doi-asserted-by":"crossref","unstructured":"B. Calder, D. Grunwald, \"Next Cache Line and Set Prediction,\" the 22nd International Symposium on Computer Architecture, June 1995. pp. 287--296.","DOI":"10.1145\/223982.224439"},{"key":"key-10.1145\/1275165.1275170-6","doi-asserted-by":"crossref","unstructured":"D. Lee, J.-L. Baer, B. Calder, and D. Grunwald, \"Instruction Cache Fetch Policies for Speculative Execution,\" the 22nd International Symposium on Computer Architecture, June 1995. pp. 357--367.","DOI":"10.1145\/223982.224446"},{"key":"key-10.1145\/1275165.1275170-7","doi-asserted-by":"crossref","unstructured":"T. M. Conte, K. N. Menezes, P. M. Mills, and B. A. Patel, \"Optimization of Instruction Fetch Mechanisms for High Issue Rates,\" the 22nd International Symposium on Computer Architecture, June 1995. pp. 333--344.","DOI":"10.1145\/223982.224444"},{"key":"key-10.1145\/1275165.1275170-8","doi-asserted-by":"crossref","unstructured":"K. C. Yeager, \"The MIPS R10000 Superscalar Microprocessor,\" IEEE Micro, April 1996, pp. 28--40.","DOI":"10.1109\/40.491460"},{"key":"key-10.1145\/1275165.1275170-9","doi-asserted-by":"crossref","unstructured":"J. H. Edmondson, P. Rubinfeld, R. Preston, and V. Rajagopalan, \"Superscalar Instruction Execution in the 21164 Alpha Microprocessor,\" IEEE Micro, April 1995, pp.33--43.","DOI":"10.1109\/40.372349"}],"event":{"name":"the 1997 workshop","start":{"date-parts":[[1997,1,1]]},"number":"WCAE-3 1997","location":"Not Known","acronym":"WCAE-3 '97"},"container-title":["Proceedings of the 1997 workshop on Computer architecture education - WCAE-3 '97"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1275165.1275170","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/dl.acm.org\/ft_gateway.cfm?id=1275170&amp;ftid=435224&amp;dwn=1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T14:58:28Z","timestamp":1750258708000},"score":1,"resource":{"primary":{"URL":"http:\/\/dl.acm.org\/citation.cfm?doid=1275165.1275170"}},"subtitle":[],"proceedings-subject":"Computer architecture education","short-title":[],"issued":{"date-parts":[[1995]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1145\/1275165.1275170","relation":{},"subject":[],"published":{"date-parts":[[1995]]}}}