{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:39:37Z","timestamp":1750307977611,"version":"3.41.0"},"publisher-location":"New York, New York, USA","reference-count":25,"publisher":"ACM Press","license":[{"start":{"date-parts":[[2002,1,1]],"date-time":"2002-01-01T00:00:00Z","timestamp":1009843200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2002]]},"DOI":"10.1145\/1275462.1275476","type":"proceedings-article","created":{"date-parts":[[2016,3,25]],"date-time":"2016-03-25T12:48:51Z","timestamp":1458910131000},"page":"9-es","source":"Crossref","is-referenced-by-count":5,"title":["Effective support of simulation in computer architecture instruction"],"prefix":"10.1145","author":[{"given":"Christopher T.","family":"Weaver","sequence":"first","affiliation":[{"name":"University of Michigan"}]},{"given":"Eric","family":"Larson","sequence":"additional","affiliation":[{"name":"University of Michigan"}]},{"given":"Todd","family":"Austin","sequence":"additional","affiliation":[{"name":"University of Michigan"}]}],"member":"320","reference":[{"key":"key-10.1145\/1275462.1275476-1","unstructured":"T. Austin. DIVA: A Dynamic Approach to Microprocessor Verification.Journal of Instruction-Level Parallelism Vol. 2, Jun. 2000."},{"key":"key-10.1145\/1275462.1275476-2","unstructured":"S. Breach. Design and Evaluation of a Multiscalar Processor.Ph.D. thesis, University of Wisconsin-Madison, 1999."},{"key":"key-10.1145\/1275462.1275476-3","doi-asserted-by":"crossref","unstructured":"D. Burger and T. Austin. The SimpleScalar Tool Set, Version 2.0.University of Wisconsin Computer Sciences Technical Report #1342, June 1997.","DOI":"10.1145\/268806.268810"},{"key":"key-10.1145\/1275462.1275476-4","doi-asserted-by":"crossref","unstructured":"T. Diep. VMW: A Visualization-based Microarchitecture Workbench.Ph.D. thesis, Carnegie Mellon University, June 1995.","DOI":"10.1109\/2.476200"},{"key":"key-10.1145\/1275462.1275476-5","unstructured":"J. Edler and M. Hill. Dinero IV Trace-Driven Uniprocessor Cache Simulator.http:\/\/www.neci.nj.nec.com\/homepages\/edler\/d4."},{"key":"key-10.1145\/1275462.1275476-6","unstructured":"J. Hennessy and D. Patterson. Computer Architecture: A Quantitative Approach, Morgan Kaufmann, San Francisco, 1996."},{"key":"key-10.1145\/1275462.1275476-7","unstructured":"E. Larson, S. Chatterjee, T. Austin. MASE: A Novel Infrastructure for Detailed Microarchitectural Modeling.Proceedings of the 2001 International Symposium on Performance Analysis of Systems and Software, Nov. 2001."},{"key":"key-10.1145\/1275462.1275476-8","unstructured":"P. Magnusson, F. Dahlgren, H. Grahn, M. Karlsson, F. Larsson, F. Lundholm, A. Moestedt, J. Nilsson, P. Stenstr&#246;m, and B. Werner. SimICS\/sun4m: A Virtual Workstation.Usenix Annual Technical Conference, June 1998."},{"key":"key-10.1145\/1275462.1275476-9","unstructured":"A. Moshovos and G. Sohi. Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors.The 6th Annual Int. Symposium on High Performance Computer Architecture, Jan. 2000."},{"key":"key-10.1145\/1275462.1275476-10","doi-asserted-by":"crossref","unstructured":"M. Moudgill, J. Wellman, J. Moreno. Environment for PowerPC Microarchitecture Exploration.IEEE Micro, May\/June 1999.","DOI":"10.1109\/40.768496"},{"key":"key-10.1145\/1275462.1275476-11","doi-asserted-by":"crossref","unstructured":"V. Pai, P. Ranganathan, and S. Adve. RSIM Reference Manual. Version 1.0.Technical Report 9705, Department of Electrical and Computer Engineering, Rice University, July 1997.","DOI":"10.1145\/271014.271015"},{"key":"key-10.1145\/1275462.1275476-12","doi-asserted-by":"crossref","unstructured":"D. Papworth. Tuning the Pentium Pro Microarchitecture.IEEE Micro, April 1996.","DOI":"10.1109\/40.491458"},{"key":"key-10.1145\/1275462.1275476-13","doi-asserted-by":"crossref","unstructured":"M. Rosenblum, S. Herrod, E. Witchel, and A. Gupta. Complete computer system simulation: the SIMOS approach.IEEE Parallel & Distributed Technology: Systems & Applications, Winter 1995.","DOI":"10.1109\/88.473612"},{"key":"key-10.1145\/1275462.1275476-14","doi-asserted-by":"crossref","unstructured":"A. Srivastava and A. Eustace. ATOM: A system for building customized program analysis tools.Proc. of the 1994 Symposium on Programming Language Design and Implementation, June 1994.","DOI":"10.1145\/178243.178260"},{"key":"key-10.1145\/1275462.1275476-15","unstructured":"R. Sugumar and S. Abraham. cheetah - Single-pass simulator for direct-mapped, set-associative and fully associative caches.Unix Manual Page, 1993."},{"key":"key-10.1145\/1275462.1275476-16","doi-asserted-by":"crossref","unstructured":"D. Tullsen, S. Eggers, and H. Levy. Simultaneous Multithreading: Maximizing On-Chip Parallelism.Proc. of the 22nd Annual Int. Symposium on Computer Architecture, June 1995.","DOI":"10.1145\/223982.224449"},{"key":"key-10.1145\/1275462.1275476-17","unstructured":"J. Veenstra and R. Fowler. MINT: a front end for efficient simulation of shared-memory multiprocessors.Proc. of the 2nd Int. Workshop on Modeling, Analysis and Simulation of Computer and Telecommunications Systems, Jan. 1994."},{"key":"key-10.1145\/1275462.1275476-18","unstructured":"Intel. VTune: Visual Tuning Environment, 1997. http:\/\/developer.intel.com\/design\/perftool\/vtune\/index.htm."},{"key":"key-10.1145\/1275462.1275476-19","unstructured":"DLXView. {online} Available: &lt;http:\/\/yara.ecn.purdue.edu\/~teamaaa\/dlxview\/&gt;, cited June 2001."},{"key":"key-10.1145\/1275462.1275476-20","unstructured":"A. R. Lebeck, \"Cache Conscious Programming in Undergraduate Cmputer Science,\" ACEM SIGCSE Technical Symposium on Computer Science Education, SIGCSE '99."},{"key":"key-10.1145\/1275462.1275476-21","doi-asserted-by":"crossref","unstructured":"A. R. Lebeck and David A. Wood, \"Cache Profiling and the SPEC Benchmarks: A Case Study,\" IEEE COMPUTER, 27(10): 15--26, October 1994.","DOI":"10.1109\/2.318580"},{"key":"key-10.1145\/1275462.1275476-22","unstructured":"Robert Bosch, Chris Stolte, Gordon Stoll, Mendel Rosenblum and Pat Hanrahan,\" Performance Analysis and Visualization of Parallel Systems Using SimOS and Rivet: A Case Study,\" Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, January 2000."},{"key":"key-10.1145\/1275462.1275476-23","doi-asserted-by":"crossref","unstructured":"Robert Bosch, Chris Stolte, Diane Tang, John Gerth, Mendel Rosenblum, and Pat Hanrahan,\" Rivet: A Flexible Environment for Computer Systems Visualization,\" Computer Graphics 34(1), February 2000.","DOI":"10.1145\/563788.604455"},{"key":"key-10.1145\/1275462.1275476-24","doi-asserted-by":"crossref","unstructured":"Chris Stolte, Robert Bosch, Pat Hanrahan, and Mendel Rosenblum,\" Visualizing Application Behavior on Superscalar Processors,\" In Proceedings of the Fifth IEEE Symposium on Information Visualization, October 1999.","DOI":"10.1109\/INFVIS.1999.801852"},{"key":"key-10.1145\/1275462.1275476-25","unstructured":"Chris Weaver, Kenneth C. Barr, Eric D. Marsman, Dan Ernst, and Todd Austin, \"Performance Analysis Using Pipeline Visualization,\"2001 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2001), Nov 2001."}],"event":{"name":"the 2002 workshop","start":{"date-parts":[[2002,5,26]]},"number":"WCAE 2002","theme":"Held in conjunction with the 29th International Symposium on Computer Architecture","location":"Anchorage, Alaska","acronym":"WCAE '02"},"container-title":["Proceedings of the 2002 workshop on Computer architecture education Held in conjunction with the 29th International Symposium on Computer Architecture - WCAE '02"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1275462.1275476","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/dl.acm.org\/ft_gateway.cfm?id=1275476&amp;ftid=435617&amp;dwn=1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T14:58:29Z","timestamp":1750258709000},"score":1,"resource":{"primary":{"URL":"http:\/\/dl.acm.org\/citation.cfm?doid=1275462.1275476"}},"subtitle":[],"proceedings-subject":"Computer architecture education","short-title":[],"issued":{"date-parts":[[2002]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1145\/1275462.1275476","relation":{},"subject":[],"published":{"date-parts":[[2002]]}}}