{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:51:03Z","timestamp":1750308663972,"version":"3.41.0"},"publisher-location":"New York, New York, USA","reference-count":6,"publisher":"ACM Press","license":[{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1145\/1275571.1275591","type":"proceedings-article","created":{"date-parts":[[2016,3,25]],"date-time":"2016-03-25T12:48:51Z","timestamp":1458910131000},"page":"14-es","source":"Crossref","is-referenced-by-count":0,"title":["Integrating research and e-learning in advanced computer architecture courses"],"prefix":"10.1145","author":[{"given":"Mouna","family":"Nakkar","sequence":"first","affiliation":[{"name":"University Of Sharjah"}]}],"member":"320","reference":[{"key":"key-10.1145\/1275571.1275591-1","unstructured":"J. L. Hennessy & D. A. Patterson, \"Computer Architecture A Quantitative Approach 3&#60;sup&#62;rd&#60;\/sup&#62; edition,\" Morgan Kaufmann Publishers, USA, 2003."},{"key":"key-10.1145\/1275571.1275591-2","unstructured":"Barry Wilkinson, \"Computer Architecture Design and Performance 2&#60;sup&#62;nd&#60;\/sup&#62; edition,\" Prentice Hall Europe, 1996."},{"key":"key-10.1145\/1275571.1275591-3","unstructured":"M. Morris Mano, \"Computer System Architecture 3&#60;sup&#62;rd&#60;\/sup&#62; edition,\" Prentice Hall, Inc. USA, 1993."},{"key":"key-10.1145\/1275571.1275591-4","doi-asserted-by":"crossref","unstructured":"Bruce Jacob and Trevor Mudge, \"Virtual Memory in Contemporary Microprocessors,\" IEEE Micro, vol. 18, no 4, pp. 60--75, July 1998.","DOI":"10.1109\/40.710872"},{"key":"key-10.1145\/1275571.1275591-5","unstructured":"M. Mittal, A. Peleg and U. Weiser \"MMX technology Architecture Overview,\" Intel Technology Journal, pp. 1--12, Q3, 1997."},{"key":"key-10.1145\/1275571.1275591-6","doi-asserted-by":"crossref","unstructured":"Heald et. all, \"Implementation of the third generation SPARC V9 64--b microprocessor,\" ISSCC Digest of Technical Papers, pp 412--413, 2000.","DOI":"10.1109\/ISSCC.2000.839838"}],"event":{"name":"the 2004 workshop","start":{"date-parts":[[2004,6,19]]},"number":"WCAE 2004","theme":"held in conjunction with the 31st International Symposium on Computer Architecture","location":"Munich, Germany","acronym":"WCAE '04"},"container-title":["Proceedings of the 2004 workshop on Computer architecture education held in conjunction with the 31st International Symposium on Computer Architecture - WCAE '04"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1275571.1275591","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/dl.acm.org\/ft_gateway.cfm?id=1275591&amp;ftid=435905&amp;dwn=1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T20:00:31Z","timestamp":1750276831000},"score":1,"resource":{"primary":{"URL":"http:\/\/dl.acm.org\/citation.cfm?doid=1275571.1275591"}},"subtitle":[],"proceedings-subject":"Computer architecture education","short-title":[],"issued":{"date-parts":[[2004]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1145\/1275571.1275591","relation":{},"subject":[],"published":{"date-parts":[[2004]]}}}