{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,24]],"date-time":"2026-02-24T17:15:16Z","timestamp":1771953316555,"version":"3.50.1"},"reference-count":42,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2007,11,1]],"date-time":"2007-11-01T00:00:00Z","timestamp":1193875200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Program. Lang. Syst."],"published-print":{"date-parts":[[2007,11]]},"abstract":"<jats:p>\n            This article presents\n            <jats:italic>Forma<\/jats:italic>\n            , a practical, safe, and automatic data reshaping framework that reorganizes arrays to improve data locality.\n            <jats:italic>Forma<\/jats:italic>\n            splits large aggregated data-types into smaller ones to improve data locality. Arrays of these large data types are then replaced by multiple arrays of the smaller types. These new arrays form natural data streams that have smaller memory footprints, better locality, and are more suitable for hardware stream prefetching.\n            <jats:italic>Forma<\/jats:italic>\n            consists of a field-sensitive alias analyzer, a data type checker, a portable structure reshaping planner, and an array reshaper. An extensive experimental study compares different data reshaping strategies in two dimensions: (1) how the data structure is split into smaller ones (\n            <jats:italic>maximal partition<\/jats:italic>\n            \u00d7\n            <jats:italic>frequency-based partition<\/jats:italic>\n            \u00d7\n            <jats:italic>affinity-based partition<\/jats:italic>\n            ); and (2) how partitioned arrays are linked to preserve program semantics (\n            <jats:italic>address arithmetic-based reshaping<\/jats:italic>\n            \u00d7\n            <jats:italic>pointer-based reshaping<\/jats:italic>\n            ). This study exposes important characteristics of array reshaping. First, a practical data reshaper needs not only an inter-procedural analysis but also a data-type checker to make sure that array reshaping is safe. Second, the performance improvement due to array reshaping can be dramatic: standard benchmarks can run up to 2.1 times faster after array reshaping. Array reshaping may also result in some performance degradation for certain benchmarks. An extensive micro-architecture-level performance study identifies the causes for this degradation. Third, the seemingly naive maximal partition achieves best or close-to-best performance in the benchmarks studied. This article presents an analysis that explains this surprising result. Finally, address-arithmetic-based reshaping always performs better than its pointer-based counterpart.\n          <\/jats:p>","DOI":"10.1145\/1290520.1290522","type":"journal-article","created":{"date-parts":[[2007,12,7]],"date-time":"2007-12-07T19:19:01Z","timestamp":1197055141000},"page":"2","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":25,"title":["<i>Forma<\/i>"],"prefix":"10.1145","volume":"30","author":[{"given":"Peng","family":"Zhao","sequence":"first","affiliation":[{"name":"University of Alberta, Edmonton, AB, Canada"}]},{"given":"Shimin","family":"Cui","sequence":"additional","affiliation":[{"name":"IBM Toronto Software Laboratory, ON, Canada"}]},{"given":"Yaoqing","family":"Gao","sequence":"additional","affiliation":[{"name":"IBM Toronto Software Laboratory, ON, Canada"}]},{"given":"Ra\u00fal","family":"Silvera","sequence":"additional","affiliation":[{"name":"IBM Toronto Software Laboratory, ON, Canada"}]},{"given":"Jos\u00e9 Nelson","family":"Amaral","sequence":"additional","affiliation":[{"name":"University of Alberta, Edmonton, AB, Canada"}]}],"member":"320","published-online":{"date-parts":[[2007,11]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT)","author":"Al-Sukhni H.","unstructured":"Al-Sukhni , H. , Bratt , I. , and Connors , D. A . 2003. Compiler-directed content-aware prefetching for dynamic data structures . In Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT) ( New Orleans, LA). 91--100. Al-Sukhni, H., Bratt, I., and Connors, D. A. 2003. Compiler-directed content-aware prefetching for dynamic data structures. In Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT) (New Orleans, LA). 91--100."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/502874.502897"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/209936.209954"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/377792.377906"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/93542.93585"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/301618.301635"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/781131.781157"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/301618.301670"},{"key":"e_1_2_1_9_1","volume-title":"Tech. Report ICS-TR-98-34, Dept. of Information and Computer Science, Univ. of California, Irvine","author":"Franz M.","year":"1998","unstructured":"Franz , M. and Kistler , T . 1998 . Splitting data objects to increase cache utilization. Tech. Report ICS-TR-98-34, Dept. of Information and Computer Science, Univ. of California, Irvine , Irvine, CA , Oct. Franz, M. and Kistler, T. 1998. Splitting data objects to increase cache utilization. Tech. Report ICS-TR-98-34, Dept. of Information and Computer Science, Univ. of California, Irvine, Irvine, CA, Oct."},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/347324.348916"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1016\/0004-3702(95)00111-5"},{"key":"e_1_2_1_12_1","volume-title":"Proceedings of the Mid-Atlantic Student Workshop on Programming Languages and Systems","author":"Hsu C.","unstructured":"Hsu , C. and Kremer , U . 2000. A stable and efficient loop tiling algorithm . In Proceedings of the Mid-Atlantic Student Workshop on Programming Languages and Systems ( Newark, DE). Hsu, C. and Kremer, U. 2000. A stable and efficient loop tiling algorithm. In Proceedings of the Mid-Atlantic Student Workshop on Programming Languages and Systems (Newark, DE)."},{"key":"e_1_2_1_13_1","volume-title":"The Power4\u00ae Processor Introduction and Tuning Guide","unstructured":"IBM. 2001. The Power4\u00ae Processor Introduction and Tuning Guide . IBM Corp. International Technical Support Organization , http:\/\/www.redbooks.ibm.com\/. IBM. 2001. The Power4\u00ae Processor Introduction and Tuning Guide. IBM Corp. International Technical Support Organization, http:\/\/www.redbooks.ibm.com\/."},{"key":"e_1_2_1_14_1","volume-title":"Intel\u00ae Itanium\u00ae Architecture Software Developer's Manual","author":"Intel","unstructured":"Intel . 2002. Intel\u00ae Itanium\u00ae Architecture Software Developer's Manual . Intel Corporation . Intel. 2002. Intel\u00ae Itanium\u00ae Architecture Software Developer's Manual. Intel Corporation."},{"key":"e_1_2_1_15_1","volume-title":"Proceedings of the Workshop on Languages and Compilers for Parallel Computing (LCPC)","author":"Ishizaka K.","unstructured":"Ishizaka , K. , Obata , M. , and Kasahara , H . 2003. Cache optimization for coarse grain task parallel processing using inter-array padding . In Proceedings of the Workshop on Languages and Compilers for Parallel Computing (LCPC) ( College Station, TX). 64--76. Ishizaka, K., Obata, M., and Kasahara, H. 2003. Cache optimization for coarse grain task parallel processing using inter-array padding. In Proceedings of the Workshop on Languages and Compilers for Parallel Computing (LCPC) (College Station, TX). 64--76."},{"key":"e_1_2_1_16_1","volume-title":"Programming Languages - C","unstructured":"ISO\/IEC. 1990. Programming Languages - C . 1 st Edition. International Standard ISO\/IEC 9899. ISO\/IEC. 1990. Programming Languages - C. 1st Edition. International Standard ISO\/IEC 9899.","edition":"1"},{"key":"e_1_2_1_17_1","volume-title":"Proceedings of the 6th International Symposium on High-Performance Computer Architecture","author":"Karlsson M.","unstructured":"Karlsson , M. , Dahlgren , F. , and Stenstrom , P . 2000. A prefetching technique for irregular accesses to linked data structures . In Proceedings of the 6th International Symposium on High-Performance Computer Architecture ( Toulouse, France). 206--217. Karlsson, M., Dahlgren, F., and Stenstrom, P. 2000. A prefetching technique for irregular accesses to linked data structures. In Proceedings of the 6th International Symposium on High-Performance Computer Architecture (Toulouse, France). 206--217."},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/335231.335244"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/258915.258946"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/773146.773041"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/237090.237190"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/233561.233564"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/503272.503286"},{"key":"e_1_2_1_25_1","volume-title":"Proceedings of the International Conference on High Performance Computing","author":"Niewiadomski R.","unstructured":"Niewiadomski , R. , Amaral , J. N. , and Holte , R . 2003. Crafting data structures: A study of reference locality in refinement-based path finding . In Proceedings of the International Conference on High Performance Computing ( Hyderabad, India). Springer-Verlag, New York, 438--448. Niewiadomski, R., Amaral, J. N., and Holte, R. 2003. Crafting data structures: A study of reference locality in refinement-based path finding. In Proceedings of the International Conference on High Performance Computing (Hyderabad, India). Springer-Verlag, New York, 438--448."},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/1005813.1041511"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/513829.513836"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/643470.643474"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/277650.277661"},{"key":"e_1_2_1_30_1","volume-title":"Proceedings of the 8th International Conference on Compiler Construction","author":"Rivera G.","unstructured":"Rivera , G. and Tseng , C . -W. 1999. A comparison of compiler tiling algorithms . In Proceedings of the 8th International Conference on Compiler Construction ( Amsterdam, Netherlands). Springer-Verlag, New York, 168--182. Rivera, G. and Tseng, C.-W. 1999. A comparison of compiler tiling algorithms. In Proceedings of the 8th International Conference on Compiler Construction (Amsterdam, Netherlands). Springer-Verlag, New York, 168--182."},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/291006.291034"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-36579-6_10"},{"key":"e_1_2_1_33_1","volume-title":"Proceedings of the Mid-Atlantic Student Workshop on Programming Languages and Systems","author":"Singhai S.","year":"1996","unstructured":"Singhai , S. and McKinley , K. 1996 . Loop fusion for data locality and parallelism . In Proceedings of the Mid-Atlantic Student Workshop on Programming Languages and Systems ( New Paltz, NY). Singhai, S. and McKinley, K. 1996. Loop fusion for data locality and parallelism. In Proceedings of the Mid-Atlantic Student Workshop on Programming Languages and Systems (New Paltz, NY)."},{"key":"e_1_2_1_34_1","doi-asserted-by":"crossref","unstructured":"Singhai S. and McKinley K. S. 1997. A parameterized loop fusion algorithm for improving parallelism and cache locality. Compute. J. 40 6 340--355.  Singhai S. and McKinley K. S. 1997. A parameterized loop fusion algorithm for improving parallelism and cache locality. Compute. J. 40 6 340--355.","DOI":"10.1093\/comjnl\/40.6.340"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.5555\/647473.727458"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/237721.237727"},{"key":"e_1_2_1_37_1","volume-title":"Proceedings of the International Conference on Compiler Construction 2001","author":"Stoutchinin A.","unstructured":"Stoutchinin , A. , Amaral , J. N. , Gao , G. R. , Dehnert , J. , Jain , S. , and Douillet , A . 2001. Speculative prefetching of induction pointers . In Proceedings of the International Conference on Compiler Construction 2001 ( Genova, Italy). Springer-Verlag, New York, 289--303. Stoutchinin, A., Amaral, J. N., Gao, G. R., Dehnert, J., Jain, S., and Douillet, A. 2001. Speculative prefetching of induction pointers. In Proceedings of the International Conference on Compiler Construction 2001 (Genova, Italy). Springer-Verlag, New York, 289--303."},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/781131.781142"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/358923.358939"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.5555\/645818.669220"},{"key":"e_1_2_1_41_1","volume-title":"High Performance Compilers for Parallel Computing","author":"Wolfe M. J.","unstructured":"Wolfe , M. J. 1996. High Performance Compilers for Parallel Computing . Addison-Wesley , Reading, MA . Wolfe, M. J. 1996. High Performance Compilers for Parallel Computing. Addison-Wesley, Reading, MA."},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/301618.301647"},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/996841.996872"}],"container-title":["ACM Transactions on Programming Languages and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1290520.1290522","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1290520.1290522","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T14:52:24Z","timestamp":1750258344000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1290520.1290522"}},"subtitle":["A framework for safe automatic array reshaping"],"short-title":[],"issued":{"date-parts":[[2007,11]]},"references-count":42,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2007,11]]}},"alternative-id":["10.1145\/1290520.1290522"],"URL":"https:\/\/doi.org\/10.1145\/1290520.1290522","relation":{},"ISSN":["0164-0925","1558-4593"],"issn-type":[{"value":"0164-0925","type":"print"},{"value":"1558-4593","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,11]]},"assertion":[{"value":"2007-11-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}