{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:36:28Z","timestamp":1750307788095,"version":"3.41.0"},"reference-count":35,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2008,1,1]],"date-time":"2008-01-01T00:00:00Z","timestamp":1199145600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2008,1]]},"abstract":"<jats:p>Maintaining local caches coherently in shared-memory multiprocessors results in significant power consumption. The customization methodology we propose exploits the fact that in embedded systems, important knowledge is available to the system designers regarding memory sharing between tasks. We demonstrate how the snoop-induced cache probings can be significantly reduced by identifying and exploiting in a deterministic way the shared memory regions between the processors. Snoop activity is enabled only for the accesses referring to known shared regions. The hardware support is not only cost efficient, but also software programmable, which allows for reprogrammability and customization across different tasks and applications.<\/jats:p>","DOI":"10.1145\/1297666.1297682","type":"journal-article","created":{"date-parts":[[2008,2,28]],"date-time":"2008-02-28T14:02:33Z","timestamp":1204207353000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Application-aware snoop filtering for low-power cache coherence in embedded multiprocessors"],"prefix":"10.1145","volume":"13","author":[{"given":"Xiangrong","family":"Zhou","sequence":"first","affiliation":[{"name":"University of Maryland, College Park, MD"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chenjie","family":"Yu","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, MD"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alokika","family":"Dash","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, MD"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peter","family":"Petrov","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, MD"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2008,2,6]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339696"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775990"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/781131.781144"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1080695.1069991"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.621215"},{"volume-title":"Winning the SOC Revolution","author":"Cumming P.","key":"e_1_2_1_7_1","unstructured":"Cumming , P. 2003. The TI OMAP platform approach to SoC . In Winning the SOC Revolution . Kluwer Academic . Cumming, P. 2003. The TI OMAP platform approach to SoC. In Winning the SOC Revolution. Kluwer Academic."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/349299.349309"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566471"},{"volume-title":"ARM System-on-Chip Architecture","author":"Furber S. B.","key":"e_1_2_1_10_1","unstructured":"Furber , S. B. 2000. ARM System-on-Chip Architecture . Addison-Wesley , Boston, MA . Furber, S. B. 2000. ARM System-on-Chip Architecture. Addison-Wesley, Boston, MA."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.848473"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/379605.379665"},{"key":"e_1_2_1_13_1","unstructured":"Intel Corporation. 2007. Intel XScale Microarchitecture. http:\/\/www.intel.com\/design\/intelxscale\/316283.htm.  Intel Corporation. 2007. Intel XScale Microarchitecture. http:\/\/www.intel.com\/design\/intelxscale\/316283.htm."},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2002.1033026"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/161494.161501"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/325164.325132"},{"volume-title":"Proceedings of the International Symposium on Workload Characterization, 34--45","author":"Li M.-L.","key":"e_1_2_1_17_1","unstructured":"Li , M.-L. , Sasanka , R. , Adve , S. , Chen , Y.-K. , and Debes , E . 2005. The ALPbench benchmark suite for complex multimedia applications . In Proceedings of the International Symposium on Workload Characterization, 34--45 . Li, M.-L., Sasanka, R., Adve, S., Chen, Y.-K., and Debes, E. 2005. The ALPbench benchmark suite for complex multimedia applications. In Proceedings of the International Symposium on Workload Characterization, 34--45."},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1057661.1057728"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379015"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859640"},{"volume-title":"Proceedings of the Intrnational Symposium on High-Performance Computer Architecture (HPCA), 251--262","author":"Martin M. M. K.","key":"e_1_2_1_21_1","unstructured":"Martin , M. M. K. , Sorin , D. J. , Hill , M. D. , and Wood , D. A . 2002. Bandwidth adaptive snooping . In Proceedings of the Intrnational Symposium on High-Performance Computer Architecture (HPCA), 251--262 . Martin, M. M. K., Sorin, D. J., Hill, M. D., and Wood, D. A. 2002. Bandwidth adaptive snooping. In Proceedings of the Intrnational Symposium on High-Performance Computer Architecture (HPCA), 251--262."},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.42"},{"volume-title":"Proceedings of the 7th International Symposium on High-Performance Computer Architecture (HPCA). IEEE Computer Society","author":"Moshovos A.","key":"e_1_2_1_23_1","unstructured":"Moshovos , A. , Memik , G. , Choudhary , A. , and Falsafi , B . 2001. Jetty: Filtering snoops for reduced energy consumption in SMP servers . In Proceedings of the 7th International Symposium on High-Performance Computer Architecture (HPCA). IEEE Computer Society , Washington, DC, 85--96. Moshovos, A., Memik, G., Choudhary, A., and Falsafi, B. 2001. Jetty: Filtering snoops for reduced energy consumption in SMP servers. In Proceedings of the 7th International Symposium on High-Performance Computer Architecture (HPCA). IEEE Computer Society, Washington, DC, 85--96."},{"volume-title":"Proceedings of the International Symposium on Parallel and Distributed Processing. IEEE Computer Society","author":"Nilsson J.","key":"e_1_2_1_24_1","unstructured":"Nilsson , J. , Landin , A. , and Stenstrom , P . 2003. The coherence predictor cache: A resource-efficient and accurate coherence prediction infrastructure . In Proceedings of the International Symposium on Parallel and Distributed Processing. IEEE Computer Society , Washington, DC, 10--17. Nilsson, J., Landin, A., and Stenstrom, P. 2003. The coherence predictor cache: A resource-efficient and accurate coherence prediction infrastructure. In Proceedings of the International Symposium on Parallel and Distributed Processing. IEEE Computer Society, Washington, DC, 10--17."},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/186025.186041"},{"volume-title":"Flexible Design with Configurable Processors","author":"Rowen C.","key":"e_1_2_1_26_1","unstructured":"Rowen , C. 2004. Engineering the Complex SOC. Fast , Flexible Design with Configurable Processors . Prentice Hall , NJ. Rowen, C. 2004. Engineering the Complex SOC. Fast, Flexible Design with Configurable Processors. Prentice Hall, NJ."},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/301618.301645"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/379539.379553"},{"volume-title":"Workshop on Memory Performance Issues.","author":"Saldanha C.","key":"e_1_2_1_29_1","unstructured":"Saldanha , C. and Lipasti , M . 2001. Power efficient cache-coherence . In Workshop on Memory Performance Issues. Saldanha, C. and Lipasti, M. 2001. Power efficient cache-coherence. In Workshop on Memory Performance Issues."},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.970421"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/130823.130824"},{"key":"e_1_2_1_32_1","unstructured":"Tarjan D. Thoziyoor S. and Jouppi N. 2006. Cacti 4.0: An integrated cache timing power and area model. Tech. Rep. HP Laboratories Palo Alto CA. June.  Tarjan D. Thoziyoor S. and Jouppi N. 2006. Cacti 4.0: An integrated cache timing power and area model. Tech. Rep. HP Laboratories Palo Alto CA. June."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.50"},{"volume-title":"Computers as Components: Principles of Embedded Computing Systems Design. Morgan Kaufmann","author":"Wolf W.","key":"e_1_2_1_34_1","unstructured":"Wolf , W. 2001. Computers as Components: Principles of Embedded Computing Systems Design. Morgan Kaufmann , San Francisco, CA . Wolf, W. 2001. Computers as Components: Principles of Embedded Computing Systems Design. Morgan Kaufmann, San Francisco, CA."},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996753"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1297666.1297682","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1297666.1297682","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:56:15Z","timestamp":1750254975000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1297666.1297682"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,1]]},"references-count":35,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2008,1]]}},"alternative-id":["10.1145\/1297666.1297682"],"URL":"https:\/\/doi.org\/10.1145\/1297666.1297682","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"type":"print","value":"1084-4309"},{"type":"electronic","value":"1557-7309"}],"subject":[],"published":{"date-parts":[[2008,1]]},"assertion":[{"value":"2006-05-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2007-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-02-06","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}