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The idea is that the compiler can allocate virtual registers (i.e., place holders to identify dependences among instructions) to short-lived variables, which do not need to be stored to physical storage locations. As a result, real registers (i.e., physically existed registers) can be reserved for long-lived variables for mitigating the register pressure and decreasing the register spills, leading to performance improvement. In this paper, we develop the architectural and compiler support for exploiting virtual registers for statically scheduled processors. Our experimental results show that virtual registers are very effective at reducing the register spills, which, in many cases, can achieve the performance close to the processor with twice number of real registers. Our results also indicate that, for some applications, using 24 virtual, in addition to 8 real registers, can attain even higher performance than that of 16 real without any virtual registers.<\/jats:p>","DOI":"10.1145\/1328195.1328198","type":"journal-article","created":{"date-parts":[[2008,2,8]],"date-time":"2008-02-08T15:32:16Z","timestamp":1202484736000},"page":"1-18","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Exploiting virtual registers to reduce pressure on real registers"],"prefix":"10.1145","volume":"4","author":[{"given":"Jun","family":"Yan","sequence":"first","affiliation":[{"name":"Southern Illinois University Carbondale, Carbondale, Illinois"}]},{"given":"Wei","family":"Zhang","sequence":"additional","affiliation":[{"name":"Southern Illinois University Carbondale, Carbondale, Illinois"}]}],"member":"320","published-online":{"date-parts":[[2008,1,30]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Arm7tdmi data sheet. 1995. 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