{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,5]],"date-time":"2026-08-05T17:55:47Z","timestamp":1785952547001,"version":"3.56.0"},"reference-count":42,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2008,1,29]],"date-time":"2008-01-29T00:00:00Z","timestamp":1201564800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"IT R&D Program of MIC\/IITA","award":["2006-S-040-01"],"award-info":[{"award-number":["2006-S-040-01"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2008,2]]},"abstract":"<jats:p>In this work, we present a dynamic memory allocation technique for a novel, horizontally partitioned memory subsystem targeting contemporary embedded processors with a memory management unit (MMU). We propose to replace the on-chip instruction cache with a scratchpad memory (SPM) and a small minicache. Serializing the address translation with the actual memory access enables the memory system to access either only the SPM or the minicache. Independent of the SPM size and based solely on profiling information, a postpass optimizer classifies the code of an application binary into a<jats:italic>pageable<\/jats:italic>and a<jats:italic>cacheable<\/jats:italic>code region. The latter is placed at a fixed location in the external memory and cached by the minicache. The former, the pageable code region, is copied on demand to the SPM before execution. Both the pageable code region and the SPM are logically divided into pages the size of an MMU memory page. Using the MMU's pagefault exception mechanism, a runtime scratchpad memory manager (SPMM) tracks page accesses and copies frequently executed code pages to the SPM before they get executed. In order to minimize the number of page transfers from the external memory to the SPM, good code placement techniques become more important with increasing sizes of the MMU pages. We discuss code-grouping techniques and provide an analysis of the effect of the MMU's page size on execution time, energy consumption, and external memory accesses. We show that by using the data cache as a victim buffer for the SPM, significant energy savings are possible. We evaluate our SPM allocation strategy with fifteen applications, including H.264, MP3, MPEG-4, and PGP. The proposed memory system requires 8% less die are compared to a fully-cached configuration. On average, we achieve a 31% improvement in runtime performance and a 35% reduction in energy consumption with an MMU page size of 256 bytes.<\/jats:p>","DOI":"10.1145\/1331331.1331335","type":"journal-article","created":{"date-parts":[[2008,2,28]],"date-time":"2008-02-28T14:02:33Z","timestamp":1204207353000},"page":"1-38","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":34,"title":["Dynamic scratchpad memory management for code in portable systems with an MMU"],"prefix":"10.1145","volume":"7","author":[{"given":"Bernhard","family":"Egger","sequence":"first","affiliation":[{"name":"Samsung Advanced Institute of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jaejin","family":"Lee","sequence":"additional","affiliation":[{"name":"Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Heonshik","family":"Shin","sequence":"additional","affiliation":[{"name":"Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2008,1,29]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951751"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1023833.1023869"},{"key":"e_1_2_1_3_1","unstructured":"ARM926EJ-S 2002. ARM926EJ-S Jazelle-enhanced macrocell . http:\/\/www.arm.com\/products\/CPUs\/ARM926EJ-S.html. ARM926EJ-S 2002. ARM926EJ-S Jazelle-enhanced macrocell . http:\/\/www.arm.com\/products\/CPUs\/ARM926EJ-S.html."},{"key":"e_1_2_1_4_1","unstructured":"ARMv6 2002. ARM Architecture Version 6 (ARMv6) . http:\/\/www.arm.com. ARMv6 2002. ARM Architecture Version 6 (ARMv6) . http:\/\/www.arm.com."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774805"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1254766.1254804"},{"key":"e_1_2_1_7_1","unstructured":"Cormen T. H. Leiserson C. E. and Rivest R. L. 1990. Introduction to Algorithms. The MIT Press Cambridge MA. Cormen T. H. Leiserson C. E. and Rivest R. L. 1990. Introduction to Algorithms. The MIT Press Cambridge MA."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/800001.811670"},{"key":"e_1_2_1_9_1","doi-asserted-by":"crossref","first-page":"4","DOI":"10.3233\/EMC-2005-00051","article-title":"Heap data allocation to scratch-pad memory in embedded systems","volume":"1","author":"Dominguez A.","year":"2005","journal-title":"Journal of Embedded Computing"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1176760.1176788"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1176887.1176933"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/366786.366800"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.5555\/1128020.1128563"},{"key":"e_1_2_1_14_1","unstructured":"H.264 2003. H.264 Video Codec. http:\/\/www.itu.int\/rec\/T-REC-H.264. H.264 2003. H.264 Video Codec. http:\/\/www.itu.int\/rec\/T-REC-H.264."},{"key":"e_1_2_1_15_1","unstructured":"Intel IXP Network Processor 2002. The Intel IXP Network Processor . http:\/\/developer.intel.com\/technology\/itj\/2002\/volume06issue03\/. Intel IXP Network Processor 2002. The Intel IXP Network Processor . http:\/\/developer.intel.com\/technology\/itj\/2002\/volume06issue03\/."},{"key":"e_1_2_1_16_1","unstructured":"Intel XScale 2002. Intel XScale Architecture. http:\/\/www.intel.com. Intel XScale 2002. Intel XScale Architecture. http:\/\/www.intel.com."},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1118299.1118443"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514077"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379049"},{"key":"e_1_2_1_20_1","volume-title":"International Symposium on Microarchitecture. 330--335","author":"Lee C."},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2005.27"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/291069.291032"},{"key":"e_1_2_1_23_1","unstructured":"Micron Technology Inc. 2003. MT48H8M16LF Mobile SDRAM. Micron Technology Inc. 2003. MT48H8M16LF Mobile SDRAM."},{"key":"e_1_2_1_24_1","unstructured":"Micron Technology Inc. 2004. Mobile SDRAM Power Calc 10. Micron Technology Inc. 2004. Mobile SDRAM Power Calc 10."},{"key":"e_1_2_1_25_1","unstructured":"Moussouris J. Crudele L. Freitas D. Hansen C. Hudson E. Przybylski S. Riordan T. and Rowen C. 1986. A cmos risc processor with integrated system functions. In COMPCON. Moussouris J. Crudele L. Freitas D. Hansen C. Hudson E. Przybylski S. Riordan T. and Rowen C. 1986. A cmos risc processor with integrated system functions. In COMPCON."},{"key":"e_1_2_1_26_1","unstructured":"MP3 1996. MP3 Reference Decoder. http:\/\/www.mp3-tech.org\/programmer\/sources\/dist10.tgz. MP3 1996. MP3 Reference Decoder. http:\/\/www.mp3-tech.org\/programmer\/sources\/dist10.tgz."},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086313"},{"key":"e_1_2_1_28_1","volume-title":"European Design Automation and Test Conference.","author":"Panda P. R."},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1017753.1017775"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/93542.93550"},{"key":"e_1_2_1_31_1","unstructured":"PGPi. 2002. Pretty Good Privacy (PGPi). http:\/\/www.pgpi.org\/. PGPi. 2002. Pretty Good Privacy (PGPi). http:\/\/www.pgpi.org\/."},{"key":"e_1_2_1_32_1","unstructured":"Philips LPC3180 2006. Philips LPC3180 microcontroller. http:\/\/www.standardics.philips.com\/. Philips LPC3180 2006. Philips LPC3180 microcontroller. http:\/\/www.standardics.philips.com\/."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996634"},{"key":"e_1_2_1_34_1","unstructured":"Samsung Semiconductor. 2005. K4X51163PC Mobile DDR SRAM. Samsung Semiconductor. 2005. K4X51163PC Mobile DDR SRAM."},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086310"},{"key":"e_1_2_1_36_1","unstructured":"SNACK 2004. Seoul National University Advanced Compiler Tool Kit. http:\/\/aces.snu.ac.kr\/snack.html. SNACK 2004. Seoul National University Advanced Compiler Tool Kit. http:\/\/aces.snu.ac.kr\/snack.html."},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/581199.581247"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951747"},{"key":"e_1_2_1_39_1","volume-title":"Proceedings of International Conference on Design, Automation and Test in Europe (DATE).","author":"Verma M."},{"key":"e_1_2_1_40_1","volume-title":"3rd Workshop on Embedded Systems for Real-Time Multimedia.","author":"Verma M."},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.509850"},{"key":"e_1_2_1_42_1","unstructured":"Xvid 2005. Xvid MPEG-4 Video Codec. http:\/\/www.xvid.org. Xvid 2005. Xvid MPEG-4 Video Codec. http:\/\/www.xvid.org."}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1331331.1331335","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1331331.1331335","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T20:22:27Z","timestamp":1750278147000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1331331.1331335"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,1,29]]},"references-count":42,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2008,2]]}},"alternative-id":["10.1145\/1331331.1331335"],"URL":"https:\/\/doi.org\/10.1145\/1331331.1331335","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"value":"1539-9087","type":"print"},{"value":"1558-3465","type":"electronic"}],"subject":[],"published":{"date-parts":[[2008,1,29]]},"assertion":[{"value":"2007-01-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2007-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-01-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}