{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:52:41Z","timestamp":1750308761900,"version":"3.41.0"},"reference-count":27,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2008,3,1]],"date-time":"2008-03-01T00:00:00Z","timestamp":1204329600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100000038","name":"Natural Sciences and Engineering Research Council of Canada","doi-asserted-by":"publisher","award":["CUHK413707"],"award-info":[{"award-number":["CUHK413707"]}],"id":[{"id":"10.13039\/501100000038","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Altera Corporation, the NSERC of Canada, and the Research Grants Council of Hong Kong","award":["CUHK413707"],"award-info":[{"award-number":["CUHK413707"]}]},{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","award":["EP\/C549481\/1EP\/D060567\/1"],"award-info":[{"award-number":["EP\/C549481\/1EP\/D060567\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002920","name":"Research Grants Council, University Grants Committee, Hong Kong","doi-asserted-by":"publisher","award":["CUHK413707"],"award-info":[{"award-number":["CUHK413707"]}],"id":[{"id":"10.13039\/501100002920","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2008,3]]},"abstract":"<jats:p>We present an architecture for a synthesizable datapath-oriented FPGA core that can be used to provide post-fabrication flexibility to an SoC. Our architecture is optimized for bus-based operations and employs a directional routing architecture, which allows it to be synthesized using standard ASIC design tools and flows. The primary motivation for this architecture is to provide an efficient mechanism to support on-chip debugging. The fabric can also be used to implement other datapath-oriented circuits such as those needed in signal processing and computation-intensive applications. We evaluate our architecture using a set of benchmark circuits and compare it to previous fabrics in terms of area, speed, and power.<\/jats:p>","DOI":"10.1145\/1331897.1331903","type":"journal-article","created":{"date-parts":[[2009,1,13]],"date-time":"2009-01-13T13:15:48Z","timestamp":1231852548000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications"],"prefix":"10.1145","volume":"1","author":[{"given":"Steven J.E.","family":"Wilton","sequence":"first","affiliation":[{"name":"University of British Columbia"}]},{"given":"Chun Hok","family":"Ho","sequence":"additional","affiliation":[{"name":"Imperial College London"}]},{"given":"Bradley","family":"Quinton","sequence":"additional","affiliation":[{"name":"University of British Columbia"}]},{"given":"Philip H.W.","family":"Leong","sequence":"additional","affiliation":[{"name":"Chinese University of Hong Kong"}]},{"given":"Wayne","family":"Luk","sequence":"additional","affiliation":[{"name":"Imperial College London"}]}],"member":"320","published-online":{"date-parts":[[2008,3,17]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146916"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514099"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/360276.360296"},{"volume-title":"Proceedings of the International Conference on VLSI Design. 329--343","author":"Cherepacha D.","key":"e_1_2_1_4_1"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2007.1035"},{"volume-title":"Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI. 23--40","author":"Cronquist D.","key":"e_1_2_1_6_1"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1982.1095369"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.839324"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.821545"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2006.71"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.887926"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884574"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/611817.611846"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/296399.296444"},{"key":"e_1_2_1_15_1","unstructured":"Menezes A. van Oorschot P. and Vanstone S. 1996. Handbook of Applied Cryptography. CRC Press 602--606. Menezes A. van Oorschot P. and Vanstone S. 1996. Handbook of Applied Cryptography . CRC Press 602--606."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/53644.53648"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/611817.611842"},{"volume-title":"Proceedings of the International Conference on Field-Programmable Technology. 241--247","author":"Quinton B.","key":"e_1_2_1_18_1"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.19"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.41"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.859540"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146998"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1216919.1216924"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.841038"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.876097"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/1046192.1046194"},{"volume-title":"Proceedings of the IEEE Custom Integrated Circuits Conference. IEEE Computer Society Press","author":"Ye A.","key":"e_1_2_1_27_1"}],"container-title":["ACM Transactions on Reconfigurable Technology and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1331897.1331903","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1331897.1331903","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T20:22:28Z","timestamp":1750278148000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1331897.1331903"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,3]]},"references-count":27,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2008,3]]}},"alternative-id":["10.1145\/1331897.1331903"],"URL":"https:\/\/doi.org\/10.1145\/1331897.1331903","relation":{},"ISSN":["1936-7406","1936-7414"],"issn-type":[{"type":"print","value":"1936-7406"},{"type":"electronic","value":"1936-7414"}],"subject":[],"published":{"date-parts":[[2008,3]]},"assertion":[{"value":"2007-05-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2007-12-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-03-17","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}