{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,2]],"date-time":"2026-10-02T09:36:38Z","timestamp":1790933798759,"version":"4.1.0"},"publisher-location":"New York, NY, USA","reference-count":25,"publisher":"ACM","license":[{"start":{"date-parts":[[2008,2,20]],"date-time":"2008-02-20T00:00:00Z","timestamp":1203465600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2008,2,20]]},"DOI":"10.1145\/1345206.1345240","type":"proceedings-article","created":{"date-parts":[[2008,2,28]],"date-time":"2008-02-28T14:02:49Z","timestamp":1204207369000},"page":"227-236","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":27,"title":["Toward high performance nonblocking software transactional memory"],"prefix":"10.1145","author":[{"given":"Virendra Jayant","family":"Marathe","sequence":"first","affiliation":[{"name":"University of Rochester, Rochester, NY, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mark","family":"Moir","sequence":"additional","affiliation":[{"name":"Sun Microsystems Inc., Burlington, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2008,2,20]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.41"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168900"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/11864219_14"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.5555\/998680.1006711"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/949305.949340"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065944.1065952"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1133981.1133984"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5555\/850929.851942"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/872035.872048"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165164"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1133956.1133967"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.35"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1066650.1066660"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1007\/11561927_26"},{"key":"e_1_3_2_1_17_1","volume-title":"the 1st ACM SIGPLAN Workshop on Transactional Computing","author":"Marathe V. J.","year":"2006","unstructured":"V. J. Marathe , M. F. Spear , C. Heriot , A. Acharya , D. Eisenstat , W. N. S. III, and M. L. Scott . Lowering the overhead of nonblocking software transactional memory . In the 1st ACM SIGPLAN Workshop on Transactional Computing , 2006 . V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. S. III, and M. L. Scott. Lowering the overhead of nonblocking software transactional memory. In the 1st ACM SIGPLAN Workshop on Transactional Computing, 2006."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598134"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.54"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250675"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/1248377.1248415"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1122971.1123001"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073814.1073861"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/224964.224987"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250734.1250744"},{"key":"e_1_3_2_1_27_1","volume-title":"NZTM: Non-blocking Zero-Indirection Transactional Memory. In the 2nd ACM SIGPLAN Workshop on Transactional Computing","author":"Tabba F.","year":"2007","unstructured":"F. Tabba , C. Wang , J. R. Goodman , and M. Moir . NZTM: Non-blocking Zero-Indirection Transactional Memory. In the 2nd ACM SIGPLAN Workshop on Transactional Computing , 2007 . F. Tabba, C. Wang, J. R. Goodman, and M. Moir. NZTM: Non-blocking Zero-Indirection Transactional Memory. In the 2nd ACM SIGPLAN Workshop on Transactional Computing, 2007."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2007.4"}],"event":{"name":"PPoPP08: ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming","location":"Salt Lake City UT USA","acronym":"PPoPP08","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","ACM Association for Computing Machinery"]},"container-title":["Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1345206.1345240","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1345206.1345240","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:56:18Z","timestamp":1750254978000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1345206.1345240"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,2,20]]},"references-count":25,"alternative-id":["10.1145\/1345206.1345240","10.1145\/1345206"],"URL":"https:\/\/doi.org\/10.1145\/1345206.1345240","relation":{},"subject":[],"published":{"date-parts":[[2008,2,20]]},"assertion":[{"value":"2008-02-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}