{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,10]],"date-time":"2025-09-10T22:11:11Z","timestamp":1757542271472,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2007,11,10]],"date-time":"2007-11-10T00:00:00Z","timestamp":1194652800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2007,11,10]]},"DOI":"10.1145\/1362622.1362672","type":"proceedings-article","created":{"date-parts":[[2008,4,22]],"date-time":"2008-04-22T19:41:13Z","timestamp":1208893273000},"page":"1-12","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["High-performance ethernet-based communications for future multi-core processors"],"prefix":"10.1145","author":[{"given":"Michael","family":"Schlansker","sequence":"first","affiliation":[{"name":"Hewlett-Packard Labs\/Advanced Architecture Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nagabhushan","family":"Chitlur","sequence":"additional","affiliation":[{"name":"Intel Corporation\/Corporate Technology Group"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Erwin","family":"Oertli","sequence":"additional","affiliation":[{"name":"VMware"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"suffix":"Jr","given":"Paul M.","family":"Stillwell","sequence":"additional","affiliation":[{"name":"Intel Corporation\/Corporate Technology Group"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Linda","family":"Rankin","sequence":"additional","affiliation":[{"name":"Intel Corporation\/Corporate Technology Group"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dennis","family":"Bradford","sequence":"additional","affiliation":[{"name":"Intel Corporation\/Corporate Technology Group"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Richard J.","family":"Carter","sequence":"additional","affiliation":[{"name":"Hewlett-Packard Labs\/Advanced Architecture Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jayaram","family":"Mudigonda","sequence":"additional","affiliation":[{"name":"Hewlett-Packard Labs\/Advanced Architecture Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nathan","family":"Binkert","sequence":"additional","affiliation":[{"name":"Hewlett-Packard Labs\/Advanced Architecture Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Norman P.","family":"Jouppi","sequence":"additional","affiliation":[{"name":"Hewlett-Packard Labs\/Advanced Architecture Lab"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2007,11,10]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Proc IEEE International Conference on Cluster Computing, Boston MA","author":"P Balaj","year":"2005","unstructured":"P Balaj et. al., \"Head-to- TOE Evaluation of High- Performance Sockets o ver Protocol Offload Engines\" Proc IEEE International Conference on Cluster Computing, Boston MA , Sept. 2005 . P Balaj et. al., \"Head-to-TOE Evaluation of High- Performance Sockets over Protocol Offload Engines\" Proc IEEE International Conference on Cluster Computing, Boston MA, Sept. 2005."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168897"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.342015"},{"key":"e_1_3_2_1_4_1","first-page":"53","volume-title":"et. al. \"Fibre Channel Fabrics: Evaluation and Design.\" 29th Hawaii International Conference on System Sciences (HICSS'96), Volume 1: Software Technology and Architecture","author":"Cherkasova L.","unstructured":"L. Cherkasova , et. al. \"Fibre Channel Fabrics: Evaluation and Design.\" 29th Hawaii International Conference on System Sciences (HICSS'96), Volume 1: Software Technology and Architecture , pp. 53 -- 62 . L. Cherkasova, et. al. \"Fibre Channel Fabrics: Evaluation and Design.\" 29th Hawaii International Conference on System Sciences (HICSS'96), Volume 1: Software Technology and Architecture, pp. 53--62."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/65.224054"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.671404"},{"key":"e_1_3_2_1_7_1","volume-title":"Proceedings of the Third LACSI Symposium","author":"P Gilfeather","year":"2002","unstructured":"P Gilfeather et. al., \" Making TCP Viable as a High Performance Computing Protocol \", Proceedings of the Third LACSI Symposium , Oct 2002 . P Gilfeather et. al., \"Making TCP Viable as a High Performance Computing Protocol\", Proceedings of the Third LACSI Symposium, Oct 2002."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/65.372658"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/782814.782855"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.1268994"},{"key":"e_1_3_2_1_11_1","first-page":"1","article-title":"Speculative Flow Control for High-Radix Datacenter Interconnect Routers","author":"Minkenberg C.","year":"2007","unstructured":"C. Minkenberg and Mitchell Gusat , \" Speculative Flow Control for High-Radix Datacenter Interconnect Routers \", IPDPS , 2007 , pp. 1 -- 10 . C. Minkenberg and Mitchell Gusat, \"Speculative Flow Control for High-Radix Datacenter Interconnect Routers\", IPDPS, 2007, pp. 1--10.","journal-title":"IPDPS"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/232973.232999"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2005.02.002"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.988689"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.223"},{"key":"e_1_3_2_1_16_1","volume-title":"MPI: The Complete Reference","author":"M. Snir","year":"1998","unstructured":"M. Snir et. al. , MPI: The Complete Reference , MIT press (Vols 1 and 2), 1998 . M. Snir et. al., MPI: The Complete Reference, MIT press (Vols 1 and 2), 1998."},{"key":"e_1_3_2_1_17_1","volume-title":"IPDPS '06","author":"Sur S.","year":"2006","unstructured":"S. Sur , et. al. \" Shared Receive Queue based Scalable MPI Design for InfiniBand Clusters\" , IPDPS '06 , April 2006 . S. Sur, et. al. \"Shared Receive Queue based Scalable MPI Design for InfiniBand Clusters\", IPDPS '06, April 2006."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1188455.1188565"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45209-6_136"}],"event":{"name":"SC '07: International Conference for High Performance Computing, Networking, Storage and Analysis","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture","IEEE-CS Computer Society"],"location":"Reno Nevada","acronym":"SC '07"},"container-title":["Proceedings of the 2007 ACM\/IEEE conference on Supercomputing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1362622.1362672","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1362622.1362672","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T15:13:48Z","timestamp":1750259628000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1362622.1362672"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,11,10]]},"references-count":19,"alternative-id":["10.1145\/1362622.1362672","10.1145\/1362622"],"URL":"https:\/\/doi.org\/10.1145\/1362622.1362672","relation":{},"subject":[],"published":{"date-parts":[[2007,11,10]]},"assertion":[{"value":"2007-11-10","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}