{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:36:40Z","timestamp":1750307800324,"version":"3.41.0"},"reference-count":10,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2008,7,1]],"date-time":"2008-07-01T00:00:00Z","timestamp":1214870400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2008,7]]},"abstract":"<jats:p>In state-of-the-art digital designs, arithmetic blocks consume a major portion of the total area of the IC. The arithmetic sum-of-product (SOP) is the most widely used arithmetic block. Some of the examples of SOP are adder, subtractor, multiplier, multiply-accumulator (MAC), squarer, chain-of-adders, incrementor, decrementor, etc. In this article, we introduce a novel, area-efficient architecture to share different SOP blocks which are used in a mutually exclusive manner. We implement the core functions of the largest SOP only once and reuse different parts of the core subblocks for all other SOP operations with the help of multiplexers. This architecture can be used in the nontiming-critical paths of the design, to save significant amounts of area. Our experimental data shows that the proposed sharing-based architecture results in about 37% area savings compared to the results obtained from a commercially available best-in-class datapath synthesis tool. In addition, our proposed shared implementation consumes about 18% less power. These improvements were verified on placed-and-routed designs as well.<\/jats:p>","DOI":"10.1145\/1367045.1367060","type":"journal-article","created":{"date-parts":[[2008,7,29]],"date-time":"2008-07-29T13:22:19Z","timestamp":1217337739000},"page":"1-7","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Resource sharing among mutually exclusive sum-of-product blocks for area reduction"],"prefix":"10.1145","volume":"13","author":[{"given":"Sabyasachi","family":"Das","sequence":"first","affiliation":[{"name":"Asyst Technologies Inc., Fremont, CA"}]},{"given":"Sunil P.","family":"Khatri","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}]}],"member":"320","published-online":{"date-parts":[[2008,7,25]]},"reference":[{"volume-title":"Proceedings of the (ISCAS), 165--168","author":"Dempster A. G.","key":"e_1_2_1_1_1"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.31534"},{"volume-title":"Proceedings of the International Conference on Computer-Aided Design (ICCAD), 13--16","author":"Flores P.","key":"e_1_2_1_3_1"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/786449.786605"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378562"},{"key":"e_1_2_1_6_1","first-page":"196","article-title":"Design of high-speed multiplierless filters using a nonrecursivesigned common subexpression algorithm","volume":"49","author":"Peiro M.","year":"2002","journal-title":"IEEE TADSP"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.82037"},{"key":"e_1_2_1_8_1","unstructured":"Whitney T. S. and Earl A. J. 2003. A comparison of Dadda and Wallace multiplier delays. Adv. Signal Process. Algor. Arch. Implement. XIII 5205 552--560.  Whitney T. S. and Earl A. J. 2003. A comparison of Dadda and Wallace multiplier delays. Adv. Signal Process. Algor. Arch. Implement. XIII 5205 552--560."},{"volume-title":"Proceedings of the IEEE Conference on Acoustics, Speech, and Signal Processing, 137--140","author":"Xu F. C. C.","key":"e_1_2_1_9_1"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.4218\/etrij.04.0804.0010"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1367045.1367060","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1367045.1367060","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:56:30Z","timestamp":1750254990000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1367045.1367060"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,7]]},"references-count":10,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2008,7]]}},"alternative-id":["10.1145\/1367045.1367060"],"URL":"https:\/\/doi.org\/10.1145\/1367045.1367060","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"type":"print","value":"1084-4309"},{"type":"electronic","value":"1557-7309"}],"subject":[],"published":{"date-parts":[[2008,7]]},"assertion":[{"value":"2007-03-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2007-12-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-07-25","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}