{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T10:34:25Z","timestamp":1761561265546,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2008,6,8]],"date-time":"2008-06-08T00:00:00Z","timestamp":1212883200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2008,6,8]]},"DOI":"10.1145\/1391469.1391532","type":"proceedings-article","created":{"date-parts":[[2008,7,30]],"date-time":"2008-07-30T12:09:58Z","timestamp":1217419798000},"page":"244-249","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["The mixed signal optimum energy point"],"prefix":"10.1145","author":[{"given":"Brian P.","family":"Ginsburg","sequence":"first","affiliation":[{"name":"Texas Instruments, Dallas, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anantha P.","family":"Chandrakasan","sequence":"additional","affiliation":[{"name":"Massachusetts Institute of Technology, Cambridge, MA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2008,6,8]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/82.746663"},{"key":"e_1_3_2_1_2_1","first-page":"1968","volume-title":"Symp. on Circuits and Systems","volume":"3","author":"Lin Y.","year":"2005","unstructured":"Y. Lin constrained optimization of power in pipeline ADCs,\" in Proc. of the IEEE Int . Symp. on Circuits and Systems , vol. 3 , May 2005 , pp. 1968 -- 1971 . Y. Lin et al., \"kT\/C constrained optimization of power in pipeline ADCs,\" in Proc. of the IEEE Int. Symp. on Circuits and Systems, vol. 3, May 2005, pp. 1968--1971."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/774572.774620"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.831796"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566451"},{"key":"e_1_3_2_1_7_1","first-page":"264","article-title":"A 6b 600MHz 10mW ADC array in digital 90nm CMOS","author":"Draxelmayr D.","year":"2004","unstructured":"D. Draxelmayr , \" A 6b 600MHz 10mW ADC array in digital 90nm CMOS ,\" in ISSCC Dig. Tech. Papers , Feb. 2004 , pp. 264 -- 265 . D. Draxelmayr, \"A 6b 600MHz 10mW ADC array in digital 90nm CMOS,\" in ISSCC Dig. Tech. Papers, Feb. 2004, pp. 264--265.","journal-title":"ISSCC Dig. Tech. Papers"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.889372"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892169"},{"key":"e_1_3_2_1_10_1","first-page":"574","volume-title":"Solid-State Circuits Conf. Dig. of Tech. Papers","volume":"49","author":"Chen S.-W. M.","year":"2006","unstructured":"S.-W. M. Chen and R. W. Brodersen , \" A 6b 600MS\/s 5.3mW asynchronous ADC in 0.13&mu;m CMOS,\" in IEEE Int . Solid-State Circuits Conf. Dig. of Tech. Papers , vol. 49 , Feb. 2006 , pp. 574 -- 575 . S.-W. M. Chen and R. W. Brodersen, \"A 6b 600MS\/s 5.3mW asynchronous ADC in 0.13&mu;m CMOS,\" in IEEE Int. Solid-State Circuits Conf. Dig. of Tech. Papers, vol. 49, Feb. 2006, pp. 574--575."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2002.1049721"},{"key":"e_1_3_2_1_12_1","volume-title":"dissertation","author":"Ginsburg B. P.","year":"2007","unstructured":"B. P. Ginsburg , \"Energy-efficient analog-to-digital conversion for ultra-wideband radio,\" Ph. D. dissertation , Massachusetts Institute of Technology , Cambridge, MA , 2007 . B. P. Ginsburg, \"Energy-efficient analog-to-digital conversion for ultra-wideband radio,\" Ph.D. dissertation, Massachusetts Institute of Technology, Cambridge, MA, 2007."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.906210"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.643648"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.856286"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.735530"},{"key":"e_1_3_2_1_17_1","volume-title":"Digital Integrated Circuits","author":"Rabaey J. M.","year":"2002","unstructured":"J. M. Rabaey , A. Chandrakasan , and B. Nikoli\u0107 , Digital Integrated Circuits , 2 nd ed. Prentice-Hall , 2002 . J. M. Rabaey, A. Chandrakasan, and B. Nikoli\u0107, Digital Integrated Circuits, 2nd ed. Prentice-Hall, 2002.","edition":"2"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.293111"},{"key":"e_1_3_2_1_19_1","first-page":"240","volume-title":"Solid-State Circuits Conf. Dig. of Tech. Papers","volume":"51","author":"Ginsburg B. P.","year":"2008","unstructured":"B. P. Ginsburg and A. P. Chandrakasan , \" Highly-interleaved 5b 250MS\/s ADC with redundant channels in 65nm CMOS,\" in IEEE Int . Solid-State Circuits Conf. Dig. of Tech. Papers , vol. 51 , Feb. 2008 , pp. 240 -- 241 . B. P. Ginsburg and A. P. Chandrakasan, \"Highly-interleaved 5b 250MS\/s ADC with redundant channels in 65nm CMOS,\" in IEEE Int. Solid-State Circuits Conf. Dig. of Tech. Papers, vol. 51, Feb. 2008, pp. 240--241."}],"event":{"name":"DAC '08: The 45th Annual Design Automation Conference 2008","sponsor":["The EDA Consortium","IEEE\/CASS\/CANDE\/CEDA","SIGDA ACM Special Interest Group on Design Automation"],"location":"Anaheim California","acronym":"DAC '08"},"container-title":["Proceedings of the 45th annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1391469.1391532","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1391469.1391532","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:58:04Z","timestamp":1750255084000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1391469.1391532"}},"subtitle":["voltage and parallelism"],"short-title":[],"issued":{"date-parts":[[2008,6,8]]},"references-count":19,"alternative-id":["10.1145\/1391469.1391532","10.1145\/1391469"],"URL":"https:\/\/doi.org\/10.1145\/1391469.1391532","relation":{},"subject":[],"published":{"date-parts":[[2008,6,8]]},"assertion":[{"value":"2008-06-08","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}