{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,26]],"date-time":"2025-10-26T14:16:23Z","timestamp":1761488183318,"version":"3.41.0"},"reference-count":24,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2008,9,1]],"date-time":"2008-09-01T00:00:00Z","timestamp":1220227200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001868","name":"National Science Council Taiwan","doi-asserted-by":"publisher","award":["NSC96-2221-E-194-065-MY2"],"award-info":[{"award-number":["NSC96-2221-E-194-065-MY2"]}],"id":[{"id":"10.13039\/501100001868","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2008,9]]},"abstract":"<jats:p>\n            To cope with increasing demands for higher computational power and greater system flexibility, dynamically and partially reconfigurable logic has started to play an important role in embedded systems and systems-on-chip (SoC). However, when using traditional design methods and tools, it is difficult to estimate or analyze the performance impact of including such reconfigurable logic devices into a system design. In this work, we present a system-level framework, called Perfecto, which is able to perform rapid exploration of different reconfigurable design alternatives and to detect system performance bottlenecks. This framework is based on the popular IEEE standard system-level design language SystemC, which is supported by most EDA and ESL tools. Given an architecture model and an application model, Perfecto uses SystemC\n            <jats:italic>transaction-level models<\/jats:italic>\n            (TLMs) to simulate the system design alternatives automatically. Different hardware-software copartitioning, coscheduling, and placement algorithms can be embedded into the framework for analysis; thus, Perfecto can also be used to design the algorithms to be used in an operating system for reconfigurable systems. Applications to a simple illustration example and a network security system have shown how Perfecto helps a designer make intelligent partition decisions, optimize system performance, and evaluate task placements.\n          <\/jats:p>","DOI":"10.1145\/1391732.1391737","type":"journal-article","created":{"date-parts":[[2009,1,13]],"date-time":"2009-01-13T13:15:48Z","timestamp":1231852548000},"page":"1-30","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["Perfecto"],"prefix":"10.1145","volume":"1","author":[{"given":"Pao-Ann","family":"Hsiung","sequence":"first","affiliation":[{"name":"National Chung Cheng University, Chiayi, Taiwan"}]},{"given":"Chao-Sheng","family":"Lin","sequence":"additional","affiliation":[{"name":"National Chung Cheng University, Chiayi, Taiwan"}]},{"given":"Chih-Feng","family":"Liao","sequence":"additional","affiliation":[{"name":"National Chung Cheng University, Chiayi, Taiwan"}]}],"member":"320","published-online":{"date-parts":[[2008,9,19]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774820"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/275107.275136"},{"key":"e_1_2_1_3_1","unstructured":"Chiang C.-C. 2007. Hardware\/Software real-time relocatable task scheduling and placement in dynamically partial reconfigurable systems. M.S. thesis National Chung Cheng University Chiayi Taiwan.  Chiang C.-C. 2007. Hardware\/Software real-time relocatable task scheduling and placement in dynamically partial reconfigurable systems. M.S. thesis National Chung Cheng University Chiayi Taiwan."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/508352.508353"},{"volume":"2268","volume-title":"Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation (SAMOS). Lecture Notes in Computer Science","author":"Desmet D.","key":"e_1_2_1_5_1"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/278241.278309"},{"key":"e_1_2_1_7_1","article-title":"Hardware task scheduling and placement in operating systems for dynamically reconfigurable SoC","author":"Hsiung P.-A.","year":"2008","journal-title":"J. Embed. Comput. (to appear)."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1289816.1289840"},{"key":"e_1_2_1_9_1","unstructured":"Liao H.-W. 2007. Multi-Objective placement of reconfigurable hardware tasks in real-time systems. M.S. thesis National Chung Cheng University Chiayi Taiwan.  Liao H.-W. 2007. Multi-Objective placement of reconfigurable hardware tasks in real-time systems. M.S. thesis National Chung Cheng University Chiayi Taiwan."},{"key":"e_1_2_1_10_1","unstructured":"Liu C.-W. 2006. Energy efficient hardware\/software co-scheduling in reconfigurable systems. M.S. thesis National Chung Cheng University Chiayi Taiwan.  Liu C.-W. 2006. Energy efficient hardware\/software co-scheduling in reconfigurable systems. M.S. thesis National Chung Cheng University Chiayi Taiwan."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1287\/ijoc.1040.0106"},{"volume-title":"Proceedings of the 11th ProRISC Workshop on Circuits, Systems and Signal Processing Veldhoven.","author":"Mei B.","key":"e_1_2_1_12_1"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951722"},{"key":"e_1_2_1_14_1","unstructured":"(OSCI) O. S. I. 2008. SystemC User's Guide. http:\/\/www.systemc.org\/.  (OSCI) O. S. I. 2008. SystemC User's Guide. http:\/\/www.systemc.org\/."},{"volume-title":"Proceedings of the 10th Reconfigurable Architectures Workshop, International Parallel and Distributed Processing Symposium, 174--181","author":"Pelkonen A.","key":"e_1_2_1_15_1"},{"volume":"3203","volume-title":"Proceedings of the 14th International Conference on Field Programmable Logic and Application (FPL). Lecture Notes in Computer Science","author":"Qu Y.","key":"e_1_2_1_16_1"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774819"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996604"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.143"},{"key":"e_1_2_1_20_1","unstructured":"Santambrogio M. 2008. Hardware-Software codesign methodologies for dynamically reconfigurable systems. Ph.D. thesis Politecnico Di Milano Italy.  Santambrogio M. 2008. Hardware-Software codesign methodologies for dynamically reconfigurable systems. Ph.D. thesis Politecnico Di Milano Italy."},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.99"},{"volume-title":"Proceedings of the International Forum on Specification and Design Languages (FDL), 428--429","author":"Tiensyrj\u00e4 K.","key":"e_1_2_1_22_1"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/275107.275135"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1007\/11596356_49"}],"container-title":["ACM Transactions on Reconfigurable Technology and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1391732.1391737","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1391732.1391737","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T14:47:13Z","timestamp":1750258033000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1391732.1391737"}},"subtitle":["A systemc-based design-space exploration framework for dynamically reconfigurable architectures"],"short-title":[],"issued":{"date-parts":[[2008,9]]},"references-count":24,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2008,9]]}},"alternative-id":["10.1145\/1391732.1391737"],"URL":"https:\/\/doi.org\/10.1145\/1391732.1391737","relation":{},"ISSN":["1936-7406","1936-7414"],"issn-type":[{"type":"print","value":"1936-7406"},{"type":"electronic","value":"1936-7414"}],"subject":[],"published":{"date-parts":[[2008,9]]},"assertion":[{"value":"2008-03-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-09-19","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}