{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,9]],"date-time":"2025-11-09T03:30:08Z","timestamp":1762659008692,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":21,"publisher":"ACM","license":[{"start":{"date-parts":[[2008,10,19]],"date-time":"2008-10-19T00:00:00Z","timestamp":1224374400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2008,10,19]]},"DOI":"10.1145\/1450095.1450127","type":"proceedings-article","created":{"date-parts":[[2008,10,22]],"date-time":"2008-10-22T12:25:44Z","timestamp":1224678344000},"page":"217-226","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Multi-granularity sampling for simulating concurrent heterogeneous applications"],"prefix":"10.1145","author":[{"given":"Melhem","family":"Tawk","sequence":"first","affiliation":[{"name":"University of Valenciennes, Valenciennes, France"}]},{"given":"Khaled Z.","family":"Ibrahim","sequence":"additional","affiliation":[{"name":"IRISA\/INRIA, Rennes, France"}]},{"given":"Smail","family":"Niar","sequence":"additional","affiliation":[{"name":"INRIA Lille-Nord-Europe, Villeneuve d'ASCQ, France"}]}],"member":"320","published-online":{"date-parts":[[2008,10,19]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2007.01.004"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2007.21"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-005-6648-1"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.68"},{"key":"e_1_3_2_1_5_1","first-page":"143","volume-title":"Considering All Starting Points for Simultaneous Multithreading Simulation. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)","author":"Biesbroucky M. V.","year":"2006","unstructured":"M. V. Biesbroucky , L. Eeckhout , and B. Calder . Considering All Starting Points for Simultaneous Multithreading Simulation. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) , pages 143 -- 153 , Mar. 2006 . M. V. Biesbroucky, L. Eeckhout, and B. Calder. Considering All Starting Points for Simultaneous Multithreading Simulation. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pages 143--153, Mar. 2006."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/1153925.1154587"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1016720.1016742"},{"key":"e_1_3_2_1_8_1","first-page":"416","volume-title":"System-level Exploration for Pareto-optimal Configurations in Parameterized System-on-a-chip. The IEEE\/ACM international conference on Computer-aided design (ICCAD)","author":"Givargis T.","year":"2001","unstructured":"T. Givargis , F. Vahid , and J. Henkel . System-level Exploration for Pareto-optimal Configurations in Parameterized System-on-a-chip. The IEEE\/ACM international conference on Computer-aided design (ICCAD) , pages 416 -- 422 , Nov. 2001 . T. Givargis, F. Vahid, and J. Henkel. System-level Exploration for Pareto-optimal Configurations in Parameterized System-on-a-chip. The IEEE\/ACM international conference on Computer-aided design (ICCAD), pages 416--422, Nov. 2001."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5555\/1128020.1128563"},{"key":"e_1_3_2_1_10_1","first-page":"338","volume-title":"A First-Order Superscalar Processor Model. Th 31st annual International Symposium on Computer Architecture (ISCA)","author":"Karkhanis T.","year":"2004","unstructured":"T. Karkhanis and J. E. Smith . A First-Order Superscalar Processor Model. Th 31st annual International Symposium on Computer Architecture (ISCA) , pages 338 -- 349 , Jun. 2004 . T. Karkhanis and J. E. Smith. A First-Order Superscalar Processor Model. Th 31st annual International Symposium on Computer Architecture (ISCA), pages 338--349, Jun. 2004."},{"key":"e_1_3_2_1_11_1","volume-title":"Benchmarking and Simulation (MOBS)","author":"Kihm J.","year":"2007","unstructured":"J. Kihm and D. Connors . CoGS-Sim - CoPhase-Guided Small-Sample Simulation of Multithreaded and Multicore Architecutres. The 3rd annual Workshop on Modeling , Benchmarking and Simulation (MOBS) , Jun. 2007 . J. Kihm and D. Connors. CoGS-Sim - CoPhase-Guided Small-Sample Simulation of Multithreaded and Multicore Architecutres. The 3rd annual Workshop on Modeling, Benchmarking and Simulation (MOBS), Jun. 2007."},{"key":"e_1_3_2_1_12_1","first-page":"84","volume-title":"Small-Sample Simulation. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)","author":"Kihm J.","year":"2007","unstructured":"J. Kihm and D. Connors . PGSS-SIM: Phase-Guided , Small-Sample Simulation. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) , pages 84 -- 93 , Apr. 2007 . J. Kihm and D. Connors. PGSS-SIM: Phase-Guided, Small-Sample Simulation. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pages 84--93, Apr. 2007."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2005.1430568"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1176254.1176301"},{"key":"e_1_3_2_1_15_1","first-page":"89","volume-title":"Statistical Simulation of Symmetric Multiprocessor Systems. The 35th annual Simulation Symposium (SS)","author":"Nussbaum S.","year":"2002","unstructured":"S. Nussbaum and J. E. Smith . Statistical Simulation of Symmetric Multiprocessor Systems. The 35th annual Simulation Symposium (SS) , pages 89 -- 97 , Apr. 2002 . S. Nussbaum and J. E. Smith. Statistical Simulation of Symmetric Multiprocessor Systems. The 35th annual Simulation Symposium (SS), pages 89--97, Apr. 2002."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.106"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605403"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOTS.2007.6"},{"key":"e_1_3_2_1_19_1","first-page":"12","volume-title":"The XXII Conference on Design of Circuits and Integrated Systems (DCIS)","author":"Valle P. G. D.","year":"2006","unstructured":"P. G. D. Valle , D. Atienza , I. Magan , J. G. Flores , J. M. M. E. A. Perez , L. Benini , and G. D. Micheli . Architectural Exploration of MPSoC Designs Based on an FPGA Emulation Framework . The XXII Conference on Design of Circuits and Integrated Systems (DCIS) , pages 12 -- 18 , Dec. 2006 . P. G. D. Valle, D. Atienza, I. Magan, J. G. Flores, J. M. M. E. A. Perez, L. Benini, and G. D. Micheli. Architectural Exploration of MPSoC Designs Based on an FPGA Emulation Framework. The XXII Conference on Design of Circuits and Integrated Systems (DCIS), pages 12--18, Dec. 2006."},{"key":"e_1_3_2_1_20_1","first-page":"2","volume-title":"Simulation Sampling with Live-Points. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)","author":"Wenisch T.","year":"2006","unstructured":"T. Wenisch , R. Wunderlich , B. Falsafi , and J. Hoe . Simulation Sampling with Live-Points. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) , pages 2 -- 12 , Mar. 2006 . T. Wenisch, R. Wunderlich, B. Falsafi, and J. Hoe. Simulation Sampling with Live-Points. The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pages 2--12, Mar. 2006."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859629"}],"event":{"name":"ESWEEK 08: Fourth Embedded Systems Week","sponsor":["ACM Association for Computing Machinery","SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"Atlanta GA USA","acronym":"ESWEEK 08"},"container-title":["Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1450095.1450127","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1450095.1450127","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:30:08Z","timestamp":1750253408000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1450095.1450127"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,10,19]]},"references-count":21,"alternative-id":["10.1145\/1450095.1450127","10.1145\/1450095"],"URL":"https:\/\/doi.org\/10.1145\/1450095.1450127","relation":{},"subject":[],"published":{"date-parts":[[2008,10,19]]},"assertion":[{"value":"2008-10-19","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}