{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:34:52Z","timestamp":1750307692519,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":16,"publisher":"ACM","license":[{"start":{"date-parts":[[2008,10,19]],"date-time":"2008-10-19T00:00:00Z","timestamp":1224374400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2008,10,19]]},"DOI":"10.1145\/1450135.1450146","type":"proceedings-article","created":{"date-parts":[[2008,10,22]],"date-time":"2008-10-22T12:25:44Z","timestamp":1224678344000},"page":"43-48","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Software optimization for MPSoC"],"prefix":"10.1145","author":[{"given":"Eric","family":"Cheung","sequence":"first","affiliation":[{"name":"University of California Riverside, Riverside, CA, USA"}]},{"given":"Harry","family":"Hsieh","sequence":"additional","affiliation":[{"name":"University of California Riverside, Riverside, CA, USA"}]},{"given":"Felice","family":"Balarin","sequence":"additional","affiliation":[{"name":"Cadence Design Systems, San Jose, CA, USA"}]}],"member":"320","published-online":{"date-parts":[[2008,10,19]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/800263.809268"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.655185"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/183432.183527"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774805"},{"key":"e_1_3_2_1_5_1","first-page":"93","volume-title":"Tools for scalable parallel program analysis - vampir ng and dewiz","author":"Brunst H.","year":"2005","unstructured":"H. Brunst , D. Kranzlm\u00fcller , and W. Nagel . Tools for scalable parallel program analysis - vampir ng and dewiz . pages 93 -- 102 . 2005 . H. Brunst, D. Kranzlm\u00fcller, and W. Nagel. Tools for scalable parallel program analysis - vampir ng and dewiz. pages 93--102. 2005."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1002\/spe.4380211204"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/127601.127730"},{"key":"e_1_3_2_1_8_1","first-page":"133","volume-title":"Euro-Par '00: Proceedings from the 6th International Euro-Par Conference on Parallel Processing","author":"de Kergommeaux J. C.","year":"2000","unstructured":"J. C. de Kergommeaux and B. de Oliveira Stein. Paje: An extensible environment for visualizing multi-threaded programs executions . In Euro-Par '00: Proceedings from the 6th International Euro-Par Conference on Parallel Processing , pages 133 -- 140 , London, UK , 2000 . Springer-Verlag. J. C. de Kergommeaux and B. de Oliveira Stein. Paje: An extensible environment for visualizing multi-threaded programs executions. In Euro-Par '00: Proceedings from the 6th International Euro-Par Conference on Parallel Processing, pages 133--140, London, UK, 2000. Springer-Verlag."},{"key":"e_1_3_2_1_9_1","first-page":"418","volume-title":"DATE '02: Proceedings of the conference on Design, automation and test in Europe","author":"de Micheli G.","year":"2002","unstructured":"G. de Micheli and L. Benini . Networks on chip: A new paradigm for systems on chip design . In DATE '02: Proceedings of the conference on Design, automation and test in Europe , page 418 , Washington, DC, USA , 2002 . IEEE Computer Society. G. de Micheli and L. Benini. Networks on chip: A new paradigm for systems on chip design. In DATE '02: Proceedings of the conference on Design, automation and test in Europe, page 418, Washington, DC, USA, 2002. IEEE Computer Society."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951730"},{"key":"e_1_3_2_1_11_1","first-page":"5","volume-title":"Hardware-software cosynthesis for digital systems","author":"Gupta R. K.","year":"2002","unstructured":"R. K. Gupta and G. D. Micheli . Hardware-software cosynthesis for digital systems . pages 5 -- 17 , 2002 . R. K. Gupta and G. D. Micheli. Hardware-software cosynthesis for digital systems. pages 5--17, 2002."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146980"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514003"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/972627.972637"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378460"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996808"}],"event":{"name":"ESWEEK 08: Fourth Embedded Systems Week","sponsor":["ACM Association for Computing Machinery","SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"Atlanta GA USA","acronym":"ESWEEK 08"},"container-title":["Proceedings of the 6th IEEE\/ACM\/IFIP international conference on Hardware\/Software codesign and system synthesis"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1450135.1450146","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1450135.1450146","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:29:54Z","timestamp":1750253394000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1450135.1450146"}},"subtitle":["a mpeg-2 decoder case study"],"short-title":[],"issued":{"date-parts":[[2008,10,19]]},"references-count":16,"alternative-id":["10.1145\/1450135.1450146","10.1145\/1450135"],"URL":"https:\/\/doi.org\/10.1145\/1450135.1450146","relation":{},"subject":[],"published":{"date-parts":[[2008,10,19]]},"assertion":[{"value":"2008-10-19","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}