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However, the RTR feature comes with the cost of high configuration overhead which might negatively impact the overall performance. Currently, modern FPGAs have more advanced mechanisms for reducing the configuration overheads, particularly Partial Runtime Reconfiguration (PRTR). It has been perceived that PRTR on HPRC systems can be the trend for improving the performance. In this work, we will investigate the potential of PRTR on HPRC by formally analyzing the execution model and experimentally verifying our analytical findings by enabling PRTR for the first time, to the best of our knowledge, on one of the current HPRC systems, Cray XD1. Our approach is general and can be applied to any of the available HPRC systems. The paper will conclude with recommendations and conditions, based on our conceptual and experimental work, for the optimal utilization of PRTR as well as possible future usage in HPRC.<\/jats:p>","DOI":"10.1145\/1462586.1462590","type":"journal-article","created":{"date-parts":[[2009,1,29]],"date-time":"2009-01-29T13:48:36Z","timestamp":1233236916000},"page":"1-23","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":28,"title":["Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing"],"prefix":"10.1145","volume":"1","author":[{"given":"Esam","family":"El-Araby","sequence":"first","affiliation":[{"name":"George Washington University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ivan","family":"Gonzalez","sequence":"additional","affiliation":[{"name":"George Washington University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tarek","family":"El-Ghazawi","sequence":"additional","affiliation":[{"name":"George Washington University"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2009,1]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1117201.1117261"},{"key":"e_1_2_1_2_1","volume-title":"Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99)","author":"Bondalapati K.","unstructured":"Bondalapati , K. and Prasanna , V. K . 1999. Dynamic precision management for loop computations on reconfigurable architectures . In Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99) . 249--258. Bondalapati, K. and Prasanna, V. K. 1999. Dynamic precision management for loop computations on reconfigurable architectures. In Proceedings of the 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99). 249--258."},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2007.91"},{"key":"e_1_2_1_4_1","volume-title":"Proceedings of Engineering of Reconfigurable Systems and Algorithms.","author":"Buell D. A.","unstructured":"Buell , D. A. , Davis , J. P. , Quan , G. , Akella , S. , Devarkal , S. , Kancharla , P. , Michalski , E. A. , and Wake , H. A . 2004. Experiences with a reconfigurable computer . In Proceedings of Engineering of Reconfigurable Systems and Algorithms. Buell, D. A., Davis, J. P., Quan, G., Akella, S., Devarkal, S., Kancharla, P., Michalski, E. A., and Wake, H. A. 2004. Experiences with a reconfigurable computer. In Proceedings of Engineering of Reconfigurable Systems and Algorithms."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MIC.2003.1250580"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2006.04.001"},{"key":"e_1_2_1_7_1","unstructured":"Cray Inc. 2006. Cray XD1TM FPGA Development (S-6400-14). Cray Inc. 2006. Cray XD1 TM FPGA Development (S-6400-14)."},{"key":"e_1_2_1_8_1","first-page":"1","article-title":"System-level parallelism and concurrency maximisation in reconfigurable computing applications","volume":"2","author":"El-Araby E.","year":"2006","unstructured":"El-Araby , E. , Taher , M. , Gaj , K. , El-Ghazawi , T. , Caliga , D. , and Alexandridis , N. 2006 . System-level parallelism and concurrency maximisation in reconfigurable computing applications . Int. J. Embedd. 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