{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,27]],"date-time":"2026-02-27T03:46:52Z","timestamp":1772164012670,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":25,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,2,14]],"date-time":"2009-02-14T00:00:00Z","timestamp":1234569600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,2,14]]},"DOI":"10.1145\/1504176.1504199","type":"proceedings-article","created":{"date-parts":[[2009,2,17]],"date-time":"2009-02-17T08:22:24Z","timestamp":1234858944000},"page":"141-150","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":60,"title":["A comprehensive strategy for contention management in software transactional memory"],"prefix":"10.1145","author":[{"given":"Michael F.","family":"Spear","sequence":"first","affiliation":[{"name":"University of Rochester, Rochester, NY, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luke","family":"Dalessandro","sequence":"additional","affiliation":[{"name":"University of Rochester, Rochester, NY, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Virendra J.","family":"Marathe","sequence":"additional","affiliation":[{"name":"Sun Microsystems Labs, Burlington, MA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michael L.","family":"Scott","sequence":"additional","affiliation":[{"name":"University of Rochester, Rochester, NY, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2009,2,14]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1328438.1328449"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/362686.362692"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250674"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1007\/11864219_14"},{"key":"e_1_3_2_1_5_1","volume-title":"Proc. of the 3rd ACM SIGPLAN Workshop on Transactional Computing","author":"Dragojevi\u0107 A.","year":"2008","unstructured":"A. Dragojevi\u0107 , R. Guerraoui , and M. Kapa\u0142ka . Dividing Transactional Memories by Zero . In Proc. of the 3rd ACM SIGPLAN Workshop on Transactional Computing , Salt Lake City, UT , Feb. 2008 . A. Dragojevi\u0107, R. Guerraoui, and M. Kapa\u0142ka. Dividing Transactional Memories by Zero. In Proc. of the 3rd ACM SIGPLAN Workshop on Transactional Computing, Salt Lake City, UT, Feb. 2008."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1345206.1345241"},{"key":"e_1_3_2_1_7_1","volume-title":"Extending Contention Managers for User-Defined Priority-Based Transactions. In Workshop on Exploiting Parallelism with Transactional Memoryand other Hardware Assisted Methods (EPHAM)","author":"Gottschlich J.","year":"2008","unstructured":"J. Gottschlich and D. A. Connors . Extending Contention Managers for User-Defined Priority-Based Transactions. In Workshop on Exploiting Parallelism with Transactional Memoryand other Hardware Assisted Methods (EPHAM) , Boston, MA , Apr. 2008 . In conjunction with phCGO. J. Gottschlich and D. A. Connors. Extending Contention Managers for User-Defined Priority-Based Transactions. In Workshop on Exploiting Parallelism with Transactional Memoryand other Hardware Assisted Methods (EPHAM), Boston, MA, Apr. 2008. In conjunction with phCGO."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073814.1073863"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065944.1065952"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/872035.872048"},{"key":"e_1_3_2_1_11_1","volume-title":"Proc. of the 1st ACM SIGPLAN Workshop on Transactional Computing","author":"Marathe V. J.","year":"2006","unstructured":"V. J. Marathe , M. F. Spear , C. Heriot , A. Acharya , D. Eisenstat , W. N. Scherer III, and M. L. Scott . Lowering the Overhead of Software Transactional Memory . In Proc. of the 1st ACM SIGPLAN Workshop on Transactional Computing , Ottawa, ON, Canada , June 2006 . Expanded version available as TR 893, Dept. of Computer Science, Univ. of Rochester, Mar. 2006. V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N.Scherer III, and M. L. Scott. Lowering the Overhead of Software Transactional Memory. In Proc. of the 1st ACM SIGPLAN Workshop on Transactional Computing, Ottawa, ON, Canada, June 2006. Expanded version available as TR 893, Dept. of Computer Science, Univ. of Rochester, Mar. 2006."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378588"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1328438.1328448"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.5555\/1299042.1299063"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1248377.1248415"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073814.1073861"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1297027.1297042"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1007\/11864219_13"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2008.55"},{"key":"e_1_3_2_1_20_1","volume-title":"Proc. of the 3rd ACM SIGPLAN Workshop on Transactional Computing","author":"Spear M. F.","year":"2008","unstructured":"M. F. Spear , M. M. Michael , and M. L. Scott . Inevitability Mechanisms for Software Transactional Memory . In Proc. of the 3rd ACM SIGPLAN Workshop on Transactional Computing , Salt Lake City, UT , Feb. 2008 . M. F. Spear, M. M. Michael, and M. L. Scott. Inevitability Mechanisms for Software Transactional Memory. In Proc. of the 3rd ACM SIGPLAN Workshop on Transactional Computing, Salt Lake City, UT, Feb. 2008."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-92221-6_19"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378583"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1400751.1400850"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378584"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1248377.1248428"}],"event":{"name":"PPoPP09: ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming","location":"Raleigh NC USA","acronym":"PPoPP09","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","ACM Association for Computing Machinery"]},"container-title":["Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1504176.1504199","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1504176.1504199","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:30:08Z","timestamp":1750239008000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1504176.1504199"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,2,14]]},"references-count":25,"alternative-id":["10.1145\/1504176.1504199","10.1145\/1504176"],"URL":"https:\/\/doi.org\/10.1145\/1504176.1504199","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/1594835.1504199","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2009,2,14]]},"assertion":[{"value":"2009-02-14","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}