{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,11]],"date-time":"2026-07-11T15:47:02Z","timestamp":1783784822788,"version":"3.55.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,3,7]],"date-time":"2009-03-07T00:00:00Z","timestamp":1236384000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,3,7]]},"DOI":"10.1145\/1508244.1508263","type":"proceedings-article","created":{"date-parts":[[2009,3,10]],"date-time":"2009-03-10T08:31:33Z","timestamp":1236673893000},"page":"157-168","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":175,"title":["Early experience with a commercial hardware transactional memory implementation"],"prefix":"10.1145","author":[{"given":"Dave","family":"Dice","sequence":"first","affiliation":[{"name":"Sun Microsystems Laboratories, Burlington, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yossi","family":"Lev","sequence":"additional","affiliation":[{"name":"Brown University and Sun Microsystems Laboratories, Providence, RI, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mark","family":"Moir","sequence":"additional","affiliation":[{"name":"Sun Microsystems Laboratories, Burlington, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Daniel","family":"Nussbaum","sequence":"additional","affiliation":[{"name":"Sun Microsystems Laboratories, Burlington, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2009,3,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.41"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.34"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2009.34"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168900"},{"key":"e_1_3_2_1_5_1","volume-title":"Transact 2008 workshop. http:\/\/research.sun.com\/scalable\/pubs\/TRANSACT2008-ATMTP-Apps.pdf.","author":"Dice D.","unstructured":"D. Dice , M. Herlihy , D. Lea , Y. Lev , V. Luchangco , W. Mesard , M. Moir , K. Moore , and D. Nussbaum . Applications of the adaptive transactional memory test platform . Transact 2008 workshop. http:\/\/research.sun.com\/scalable\/pubs\/TRANSACT2008-ATMTP-Apps.pdf. D. Dice, M. Herlihy, D. Lea, Y. Lev, V. Luchangco, W. Mesard, M. Moir, K. Moore, and D. Nussbaum. Applications of the adaptive transactional memory test platform. Transact 2008 workshop. http:\/\/research.sun.com\/scalable\/pubs\/TRANSACT2008-ATMTP-Apps.pdf."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1007\/11864219_14"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/872035.872048"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165164"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1504176.1504182"},{"key":"e_1_3_2_1_11_1","volume-title":"November","author":"Lev Y.","year":"2008","unstructured":"Y. Lev , V. Luchangco , V. Marathe , M. Moir , D. Nussbaum , and M. Olszewski . Anatomy of a scalable software transactional memory , November 2008 . Under submission. Y. Lev, V. Luchangco, V. Marathe, M. Moir, D. Nussbaum, and M. Olszewski. Anatomy of a scalable software transactional memory, November 2008. Under submission."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1345206.1345236"},{"key":"e_1_3_2_1_13_1","volume-title":"Workshop on Transactional Computing (Transact), 2007","author":"Lev Y.","year":"2007","unstructured":"Y. Lev , M. Moir , and D. Nussbaum . PhTM: Phased transactional memory . In Workshop on Transactional Computing (Transact), 2007 . http:\/\/research.sun.com\/scalable\/pubs\/TRANSACT 2007 -PhTM.pdf. Y. Lev, M. Moir, and D. Nussbaum. PhTM: Phased transactional memory. In Workshop on Transactional Computing (Transact), 2007. http:\/\/research.sun.com\/scalable\/pubs\/TRANSACT2007-PhTM.pdf."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1152154.1152177"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1007\/11561927_26"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378595"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250684"},{"key":"e_1_3_2_1_18_1","volume-title":"May","author":"Neffenger J.","year":"2003","unstructured":"J. Neffenger . The volano report , May 2003 . http:\/\/www.volano.com\/report\/index.html. {19} R. Rajwar and J. Neffenger. The volano report, May 2003. http:\/\/www.volano.com\/report\/index.html. {19} R. Rajwar and"},{"key":"e_1_3_2_1_19_1","first-page":"294","volume-title":"Proc. 34th International Symposium on Microarchitecture","author":"Goodman J. R.","year":"2001","unstructured":"J. R. Goodman . Speculative lock elision: Enabling highly concurrent multithreaded execution . In Proc. 34th International Symposium on Microarchitecture , pages 294 -- 305 , Dec. 2001 . J. R. Goodman. Speculative lock elision: Enabling highly concurrent multithreaded execution. In Proc. 34th International Symposium on Microarchitecture, pages 294--305, Dec. 2001."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605399"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.54"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.9"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346204"}],"event":{"name":"ASPLOS09: Architectural Support for Programming Languages and Operating Systems","location":"Washington DC USA","acronym":"ASPLOS09","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","ACM Association for Computing Machinery","SIGARCH ACM Special Interest Group on Computer Architecture"]},"container-title":["Proceedings of the 14th international conference on Architectural support for programming languages and operating systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1508244.1508263","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1508244.1508263","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:45:53Z","timestamp":1750236353000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1508244.1508263"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,3,7]]},"references-count":22,"alternative-id":["10.1145\/1508244.1508263","10.1145\/1508244"],"URL":"https:\/\/doi.org\/10.1145\/1508244.1508263","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/2528521.1508263","asserted-by":"object"},{"id-type":"doi","id":"10.1145\/1508284.1508263","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2009,3,7]]},"assertion":[{"value":"2009-03-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}