{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,29]],"date-time":"2026-03-29T02:27:33Z","timestamp":1774751253438,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":13,"publisher":"ACM","license":[{"start":{"date-parts":[[2008,10,26]],"date-time":"2008-10-26T00:00:00Z","timestamp":1224979200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2008,10,26]]},"DOI":"10.1145\/1509084.1509088","type":"proceedings-article","created":{"date-parts":[[2009,2,25]],"date-time":"2009-02-25T14:46:05Z","timestamp":1235573165000},"page":"24-29","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["A shared cache for a chip multi vector processor"],"prefix":"10.1145","author":[{"given":"Akihiro","family":"Musa","sequence":"first","affiliation":[{"name":"Tohoku University, Sendai, Japan; NEC Corporation, Tokyo, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yoshiei","family":"Sato","sequence":"additional","affiliation":[{"name":"Tohoku University, Sendai, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Takashi","family":"Soga","sequence":"additional","affiliation":[{"name":"NEC System technologies, Osaka, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Koki","family":"Okabe","sequence":"additional","affiliation":[{"name":"Tohoku University, Sendai, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ryusuke","family":"Egawa","sequence":"additional","affiliation":[{"name":"Tohoku University, Sendai, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroyuki","family":"Takizawa","sequence":"additional","affiliation":[{"name":"Tohoku University, Sendai, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroaki","family":"Kobayashi","sequence":"additional","affiliation":[{"name":"Tohoku University, Sendai, Japan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2008,10,26]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1362622.1362646"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.20"},{"key":"e_1_3_2_1_3_1","first-page":"2","article-title":"A Hardware Overview of SX-6 and SX-7 Supercomputer","volume":"44","author":"Kitagawa K.","year":"2003","unstructured":"K. Kitagawa , S. Tagaya , Y. Hagihara , and Y. Kanoh . \" A Hardware Overview of SX-6 and SX-7 Supercomputer \". NEC Research &amp; Development , 44 : 2 -- 7 , 2003 . K. Kitagawa, S. Tagaya, Y. Hagihara, and Y. Kanoh. \"A Hardware Overview of SX-6 and SX-7 Supercomputer\". NEC Research &amp; Development, 44:2--7, 2003.","journal-title":"NEC Research &amp; Development"},{"key":"e_1_3_2_1_4_1","first-page":"21","volume-title":"M. Resch et al.","author":"Kobayashi H.","year":"2006","unstructured":"H. Kobayashi . \"Implication of Memory Performance in Vector-Parallel and Scalar-Parallel HEC\". In M. Resch et al. , editors, High Performance Computing on Vector Systems 2006 , pages 21 -- 50 . Springer-Verlag , 2006. H. Kobayashi. \"Implication of Memory Performance in Vector-Parallel and Scalar-Parallel HEC\". In M. Resch et al., editors, High Performance Computing on Vector Systems 2006, pages 21--50. Springer-Verlag, 2006."},{"key":"e_1_3_2_1_5_1","first-page":"247","volume-title":"M. Resch et al.","author":"Kobayashi H.","year":"2007","unstructured":"H. Kobayashi , A. Musa , Y. Sato , H. Takizawa , and K. Okabe . \" The potential of On-chip Memory Systems for Future Vector Architectures \". In M. Resch et al. , editors, High Performance Computing on Vector Systems 2007 , pages 247 -- 264 . Springer-Verlag , 2007. H. Kobayashi, A. Musa, Y. Sato, H. Takizawa, and K. Okabe. \"The potential of On-chip Memory Systems for Future Vector Architectures\". In M. Resch et al., editors, High Performance Computing on Vector Systems 2007, pages 247--264. Springer-Verlag, 2007."},{"key":"e_1_3_2_1_6_1","first-page":"81","volume-title":"The 8th International Symposium on Computer Architecture (ISCA)","author":"D. Kroft. \"Lockup-Free Instruction Fetch\/Prefetch Cache Organization","year":"1981","unstructured":"D. Kroft. \"Lockup-Free Instruction Fetch\/Prefetch Cache Organization \". In The 8th International Symposium on Computer Architecture (ISCA) , pages 81 -- 87 , PA, USA, 1981 . D. Kroft. \"Lockup-Free Instruction Fetch\/Prefetch Cache Organization\". In The 8th International Symposium on Computer Architecture (ISCA), pages 81--87, PA, USA, 1981."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1327171.1327173"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1007\/11946441_76"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/232973.232982"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2004.54"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1048935.1050213"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/PCCC.2007.358879"},{"key":"e_1_3_2_1_13_1","volume-title":"Technical report","author":"Servers GI.","year":"2007","unstructured":"S GI. \"SGI Altix 4700 Servers and Supercomputers\". Technical report , SGI Inc ., 2007 . http:\/\/www.sgi.com\/pdfs\/3867.pdf. SGI. \"SGI Altix 4700 Servers and Supercomputers\". Technical report, SGI Inc., 2007. http:\/\/www.sgi.com\/pdfs\/3867.pdf."}],"event":{"name":"MEDEA '08: The 2008 workshop on MEmory performance: DEaling with Applications, systems and architectures","location":"Toronto Canada","acronym":"MEDEA '08"},"container-title":["Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1509084.1509088","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1509084.1509088","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:29:46Z","timestamp":1750253386000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1509084.1509088"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,10,26]]},"references-count":13,"alternative-id":["10.1145\/1509084.1509088","10.1145\/1509084"],"URL":"https:\/\/doi.org\/10.1145\/1509084.1509088","relation":{},"subject":[],"published":{"date-parts":[[2008,10,26]]},"assertion":[{"value":"2008-10-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}