{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:34:42Z","timestamp":1750307682993,"version":"3.41.0"},"reference-count":50,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2009,4,1]],"date-time":"2009-04-01T00:00:00Z","timestamp":1238544000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2009,4]]},"abstract":"<jats:p>This article presents the first memory allocation scheme for embedded systems having a scratch-pad memory whose size is unknown at compile time. A scratch-pad memory (SPM) is a fast compiler-managed SRAM that replaces the hardware-managed cache. All existing memory allocation schemes for SPM require the SPM size to be known at compile time. Unfortunately, because of this constraint, the resulting executable is tied to that size of SPM and is not portable to other processor implementations having a different SPM size. Size-portable code is valuable when programs are downloaded during deployment either via a network or portable media. Code downloads are used for fixing bugs or for enhancing functionality. The presence of different SPM sizes in different devices is common because of the evolution in VLSI technology across years. The result is that SPM cannot be used in such situations with downloaded codes.<\/jats:p>\n          <jats:p>To overcome this limitation, our work presents a compiler method whose resulting executable is portable across SPMs of any size. Our technique is to employ a customized installer software, which decides the SPM allocation just before the program's first run, since the SPM size can be discovered at that time. The installer then, based on the decided allocation, modifies the program executable accordingly. The resulting executable places frequently used objects in SPM, considering both code and data for placement. To keep the overhead low, much of the preprocessing for the allocation is done at compile time. Results show that our benchmarks average a 41% speedup versus an all-DRAM allocation, while the optimal static allocation scheme, which knows the SPM size at compile time and is thus an unachievable upper-bound and is only slightly faster (45% faster than all-DRAM). Results also show that the overhead from our customized installer averages about 1.5% in code size, 2% in runtime, and 3% in compile time for our benchmarks.<\/jats:p>","DOI":"10.1145\/1509288.1509293","type":"journal-article","created":{"date-parts":[[2009,4,21]],"date-time":"2009-04-21T14:14:44Z","timestamp":1240323284000},"page":"1-32","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Memory allocation for embedded systems with a compile-time-unknown scratch-pad size"],"prefix":"10.1145","volume":"8","author":[{"given":"Nghi","family":"Nguyen","sequence":"first","affiliation":[{"name":"University of Maryland, College Park, MD"}]},{"given":"Angel","family":"Dominguez","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, MD"}]},{"given":"Rajeev","family":"Barua","sequence":"additional","affiliation":[{"name":"University of Maryland, College Park, MD"}]}],"member":"320","published-online":{"date-parts":[[2009,4,22]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Analog Devices. 1996. ADSP-21xx 16-bit DSP Family. http:\/\/www.analog.com\/processors\/processors\/ADSP\/index.html.  Analog Devices. 1996. ADSP-21xx 16-bit DSP Family. http:\/\/www.analog.com\/processors\/processors\/ADSP\/index.html."},{"key":"e_1_2_1_2_1","unstructured":"Analog Devices. 2001. SHARC ADSP-21160M 32-bit Embedded CPU. http:\/\/www.analog.com\/processors\/processors\/sharc\/index.html.  Analog Devices. 2001. SHARC ADSP-21160M 32-bit Embedded CPU. http:\/\/www.analog.com\/processors\/processors\/sharc\/index.html."},{"key":"e_1_2_1_3_1","unstructured":"Analog Devices. 2004. TigerSharc ADSP-TS201S 32-bit DSP. http:\/\/www.analog.com\/processors\/processors\/tigersharc\/index.html.  Analog Devices. 2004. TigerSharc ADSP-TS201S 32-bit DSP. http:\/\/www.analog.com\/processors\/processors\/tigersharc\/index.html."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951751"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1023833.1023869"},{"key":"e_1_2_1_6_1","unstructured":"Arm. 2004. ARM968E-S 32-bit Embedded Core. http:\/\/www.arm.com\/products\/CPUs\/ARM968E-S.html.  Arm. 2004. ARM968E-S 32-bit Embedded Core. http:\/\/www.arm.com\/products\/CPUs\/ARM968E-S.html."},{"key":"e_1_2_1_7_1","unstructured":"Atmel. 2004. Atmel AT91C140 16\/32-bit Embedded CPU. http:\/\/www.atmel.com\/dyn\/resources\/proddocuments\/doc6069.pdf.  Atmel. 2004. Atmel AT91C140 16\/32-bit Embedded CPU. http:\/\/www.atmel.com\/dyn\/resources\/proddocuments\/doc6069.pdf."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/502217.502223"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/581888.581891"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774805"},{"key":"e_1_2_1_11_1","unstructured":"Bohr M. Doyle B. Kavalieros J. Barlage D. Murthy A. Doczy M. Rios R. Linton T. Arghavani R. etal 2002. Intels 90nm technology: Moores law and more. Document Number: {IR-TR-2002-10}.  Bohr M. Doyle B. Kavalieros J. Barlage D. Murthy A. Doczy M. Rios R. Linton T. Arghavani R. et al. 2002. Intels 90nm technology: Moores law and more. Document Number: {IR-TR-2002-10}."},{"key":"e_1_2_1_12_1","unstructured":"Cnetx. Downloadable software. http:\/\/www.cnetx.com\/slideshow\/.  Cnetx. Downloadable software. http:\/\/www.cnetx.com\/slideshow\/."},{"key":"e_1_2_1_13_1","unstructured":"CodeSourcery. http:\/\/www.codesourcery.com\/.  CodeSourcery. http:\/\/www.codesourcery.com\/."},{"key":"e_1_2_1_14_1","first-page":"4","article-title":"Heap data allocation to scratch-pad memory in embedded systems","volume":"1","author":"Dominguez A.","year":"2005","unstructured":"Dominguez , A. , Udayakumaran , S. , and Barua , R. 2005 . Heap data allocation to scratch-pad memory in embedded systems . J. Embed. Comput. 1 , 4 . Dominguez, A., Udayakumaran, S., and Barua, R. 2005. Heap data allocation to scratch-pad memory in embedded systems. J. Embed. Comput. 1, 4.","journal-title":"J. Embed. Comput."},{"key":"e_1_2_1_15_1","unstructured":"Edler J. and Hill M. 2004. Dineroiv cache simulator. http:\/\/www.cs.wisc.edu\/markhill\/DineroIV\/.  Edler J. and Hill M. 2004. Dineroiv cache simulator. http:\/\/www.cs.wisc.edu\/markhill\/DineroIV\/."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339660"},{"key":"e_1_2_1_17_1","unstructured":"Handango. Downloadable software. http:\/\/www.handango.com\/.  Handango. Downloadable software. http:\/\/www.handango.com\/."},{"key":"e_1_2_1_18_1","unstructured":"Hennessy J. and Patterson D. 1996. Computer Architecture A Quantitative Approach 2nd Ed. Morgan Kaufmann Palo Alto CA.   Hennessy J. and Patterson D. 1996. Computer Architecture A Quantitative Approach 2nd Ed. Morgan Kaufmann Palo Alto CA."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/997163.997190"},{"key":"e_1_2_1_20_1","unstructured":"Hitachi\/Renesas. 2004. M32R-32192 32-bit Embedded CPU. http:\/\/documentation.renesas.com\/eng\/products\/mpumcu\/rej03b0019 32192ds.pdf.  Hitachi\/Renesas. 2004. M32R-32192 32-bit Embedded CPU. http:\/\/documentation.renesas.com\/eng\/products\/mpumcu\/rej03b0019 32192ds.pdf."},{"key":"e_1_2_1_21_1","unstructured":"Hitachi\/Renesas. 1999. SH7050 32-bit CPU. http:\/\/documentation.renesas.com\/eng\/products\/mpumcu\/e602121 sh7050.pdf.  Hitachi\/Renesas. 1999. SH7050 32-bit CPU. http:\/\/documentation.renesas.com\/eng\/products\/mpumcu\/e602121 sh7050.pdf."},{"key":"e_1_2_1_22_1","unstructured":"Infineon. 2001. XC-166 16-bit Embedded Family. http:\/\/www.infineon.com\/cmc_upload\/documents\/036\/812\/c166sv2um.pdf.  Infineon. 2001. XC-166 16-bit Embedded Family. http:\/\/www.infineon.com\/cmc_upload\/documents\/036\/812\/c166sv2um.pdf."},{"key":"e_1_2_1_23_1","unstructured":"Intel Flash. Intel wireless flash memory (W30). http:\/\/www.intel.com\/design\/flcomp\/datashts\/290702.htm.  Intel Flash. Intel wireless flash memory (W30). http:\/\/www.intel.com\/design\/flcomp\/datashts\/290702.htm."},{"key":"e_1_2_1_24_1","first-page":"2","article-title":"Calculating memory system power for DDR SDRAM","volume":"10","author":"Janzen J.","year":"2001","unstructured":"Janzen , J. 2001 . Calculating memory system power for DDR SDRAM . DesignLine J. 10 , 2 . Janzen, J. 2001. Calculating memory system power for DDR SDRAM. DesignLine J. 10, 2.","journal-title":"DesignLine J."},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379049"},{"key":"e_1_2_1_26_1","unstructured":"LandWare Inc. 2003. Pocket Quicken PPC20 Manual. http:\/\/www.landware.com\/downloads\/MANUALS\/PocketQuickenPPC20Manual.pdf.  LandWare Inc. 2003. Pocket Quicken PPC20 Manual. http:\/\/www.landware.com\/downloads\/MANUALS\/PocketQuickenPPC20Manual.pdf."},{"volume-title":"Proceedings of the 2nd Workshop on Intelligent Memory Systems. Springer, Berlin Germany.","author":"Moritz C. A.","key":"e_1_2_1_27_1","unstructured":"Moritz , C. A. , Frank , M. , and Amarasinghe , S . 2000. FlexCache: a framework for flexible compiler generated data caching . In Proceedings of the 2nd Workshop on Intelligent Memory Systems. Springer, Berlin Germany. Moritz, C. A., Frank, M., and Amarasinghe, S. 2000. FlexCache: a framework for flexible compiler generated data caching. In Proceedings of the 2nd Workshop on Intelligent Memory Systems. Springer, Berlin Germany."},{"key":"e_1_2_1_28_1","unstructured":"Motorola\/Freescale. 2003. Dragonball MC68SZ328 32-bit Embedded CPU. http:\/\/www.freescale.com\/files\/32bit\/doc\/factsheet\/MC68SZ328FS.pdf.  Motorola\/Freescale. 2003. Dragonball MC68SZ328 32-bit Embedded CPU. http:\/\/www.freescale.com\/files\/32bit\/doc\/factsheet\/MC68SZ328FS.pdf."},{"key":"e_1_2_1_29_1","unstructured":"Motorola\/Freescale. 2002. MPC500 32-bit MCU Family. http:\/\/www.freescale.com\/files\/microcontrollers\/doc\/factsheet\/MPC500FACT.pdf.  Motorola\/Freescale. 2002. MPC500 32-bit MCU Family. http:\/\/www.freescale.com\/files\/microcontrollers\/doc\/factsheet\/MPC500FACT.pdf."},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/348019.348570"},{"key":"e_1_2_1_31_1","volume-title":"Proceedings of the ACM Conference on Languages, Compilers and Tools for Embedded Systems (LCTES'03)","author":"Panel","year":"2003","unstructured":"Panel , L. 2003 . Compilation challenges for network processors . In Proceedings of the ACM Conference on Languages, Compilers and Tools for Embedded Systems (LCTES'03) . ACM, New York. Panel, L. 2003. Compilation challenges for network processors. In Proceedings of the ACM Conference on Languages, Compilers and Tools for Embedded Systems (LCTES'03). ACM, New York."},{"key":"e_1_2_1_32_1","unstructured":"Phatware Corp. Downloadable software. http:\/\/www.phatware.com\/phatnotes\/.  Phatware Corp. Downloadable software. http:\/\/www.phatware.com\/phatnotes\/."},{"key":"e_1_2_1_33_1","unstructured":"PhatWare Corp. 2006. PhatNotes Professional Edition Version 4.7 User's Guide. http:\/\/www.phatware.com\/doc\/PhatNotesPro.pdf.  PhatWare Corp. 2006. PhatNotes Professional Edition Version 4.7 User's Guide. http:\/\/www.phatware.com\/doc\/PhatNotesPro.pdf."},{"key":"e_1_2_1_34_1","unstructured":"Shivakumar P. and Jouppi N. 2004. Cacti 3.2. http:\/\/research.compaq.com\/wrl\/people\/jouppi\/CACTI.html.  Shivakumar P. and Jouppi N. 2004. Cacti 3.2. http:\/\/research.compaq.com\/wrl\/people\/jouppi\/CACTI.html."},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378467"},{"volume-title":"Proceedings of the International Workshop on Compiler and Architecture Support for Embedded Computing Systems (CASES'98)","author":"Sjodin J.","key":"e_1_2_1_36_1","unstructured":"Sjodin , J. , Froderberg , B. , and Lindgren , T . 1998. Allocation of global data objects in on-chip RAM . In Proceedings of the International Workshop on Compiler and Architecture Support for Embedded Computing Systems (CASES'98) . ACM, New York. Sjodin, J., Froderberg, B., and Lindgren, T. 1998. Allocation of global data objects in on-chip RAM. In Proceedings of the International Workshop on Compiler and Architecture Support for Embedded Computing Systems (CASES'98). ACM, New York."},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/502217.502221"},{"key":"e_1_2_1_38_1","unstructured":"Softmaker. Downloadable software. http:\/\/www.softmaker.de.  Softmaker. Downloadable software. http:\/\/www.softmaker.de."},{"key":"e_1_2_1_39_1","unstructured":"SoftMaker Software GmbH. 2004. Plan Maker 2004 Manual. http:\/\/www.softmaker.net\/down\/pm2004manualen.pdf.  SoftMaker Software GmbH. 2004. Plan Maker 2004 Manual. http:\/\/www.softmaker.net\/down\/pm2004manualen.pdf."},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/581199.581247"},{"volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe. IEEE","author":"Steinke S.","key":"e_1_2_1_41_1","unstructured":"Steinke , S. , Wehmeyer , L. , Lee , B. , and Marwedel , P . 2002. Assigning program and data objects to scratchpad for energy reduction . In Proceedings of the Conference on Design, Automation and Test in Europe. IEEE , Los Alamitos, CA, 409. Steinke, S., Wehmeyer, L., Lee, B., and Marwedel, P. 2002. Assigning program and data objects to scratchpad for energy reduction. In Proceedings of the Conference on Design, Automation and Test in Europe. IEEE, Los Alamitos, CA, 409."},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.335012"},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/951710.951747"},{"key":"e_1_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/1151074.1151085"},{"volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe. IEEE","author":"Verma M.","key":"e_1_2_1_45_1","unstructured":"Verma , M. , Wehmeyer , L. , and Marwedel , P . 2004a. Cache-aware scratchpad allocation algorithm . In Proceedings of the Conference on Design, Automation and Test in Europe. IEEE , Los Alamitos, CA, 21264. Verma, M., Wehmeyer, L., and Marwedel, P. 2004a. Cache-aware scratchpad allocation algorithm. In Proceedings of the Conference on Design, Automation and Test in Europe. IEEE, Los Alamitos, CA, 21264."},{"key":"e_1_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1145\/1016720.1016748"},{"key":"e_1_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/1054943.1054959"},{"volume-title":"Proceedings of the 4th International Workshop on Worst-Case Execution Time (WCET) Analysis. ACM","author":"Wehmeyer L.","key":"e_1_2_1_48_1","unstructured":"Wehmeyer , L. and Marwedel , P . 2004. Influence of onchip scratchpad memories on wcet prediction . In Proceedings of the 4th International Workshop on Worst-Case Execution Time (WCET) Analysis. ACM , New York. Wehmeyer, L. and Marwedel, P. 2004. Influence of onchip scratchpad memories on wcet prediction. In Proceedings of the 4th International Workshop on Worst-Case Execution Time (WCET) Analysis. ACM, New York."},{"key":"e_1_2_1_49_1","volume-title":"Cacti: An enhanced cache access and cycle time model","author":"Wilton S.","year":"1996","unstructured":"Wilton , S. and Jouppi , N . 1996 . Cacti: An enhanced cache access and cycle time model . IEEE J. Solid-State Circuits . Wilton, S. and Jouppi, N. 1996. Cacti: An enhanced cache access and cycle time model. IEEE J. Solid-State Circuits."},{"key":"e_1_2_1_50_1","unstructured":"Xi-art. Downloadable software. http:\/\/www.xi-art.com\/.  Xi-art. Downloadable software. http:\/\/www.xi-art.com\/."}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1509288.1509293","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1509288.1509293","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:29:47Z","timestamp":1750253387000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1509288.1509293"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,4]]},"references-count":50,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2009,4]]}},"alternative-id":["10.1145\/1509288.1509293"],"URL":"https:\/\/doi.org\/10.1145\/1509288.1509293","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"type":"print","value":"1539-9087"},{"type":"electronic","value":"1558-3465"}],"subject":[],"published":{"date-parts":[[2009,4]]},"assertion":[{"value":"2009-04-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}